International Business Machines Corporation

Hewlett-packard Development Company, L.p.

Lenovo Enterprise Solutions Pte. Ltd.

Robert Akira Kubo

Gregg Steven Lucas

John Charles Elliott

Carl Evan Jones

Brian James Cagno

Matthew J Kalos

Karl Allen Nielsen

Shah Mohammad Rezaul Islam

David Frank Mannenbach

David Ray Kahler

Matthew David Bomhoff

Richard Anthony Ripberger

James Lee Hafner

Linda Van Patten Benhase

Linda V Benhase

Andrew Dale Walls

Gary William Batchelor

Kenneth Robert Schneebeli

Krishnakumar Rao Surugucchi

Jeremy Michael Pinson

James A O'Conner

Kevin J Ash

James A O'Connor

Thomas Charles Jarvis

Matthew John Fairhurst

Yoshihiko Terashita

Michael P Vageline

Jason James Graves

Richard B Stelmach

Tohru Sumiyoshi

Katherine S Tyldesley

John C Elliot

Krishnakumar S Rao

Michael T Benhase

Aviad Zlotnick

Michael Edward Factor

Jason Aaron Matteson

William Gavin Holland

Orit Nissan-Messing

Cheng-Chung Song

Kurt Allen Lovrien

Theodore Brian Vojnovich

Andrew Boyce McNeill, Jr

Tony Carl Sass

Kevin Lee Gibble

Deanna Lynn Quigg Brown

Bret W Lehman

Jacob Lee Sheppard

Michael John Jones

Gary Valentin

William Henry Travis

Bryan John Wright

Andrew Ellis Seidel

Yoshihiro Fujie

Michihiro Okamoto

Robert Mark Lindsay

Hirokazu Nishimura

Kenji Hidaka

Koji Nakase

Basheer Neuhru Bristow

Justin Thomson Miller

Kifumi Numata

Shah Mohammed Rezaul Islam

Elena Yerushalmi

Michael A Kotson

Kenneth J Hallam

Pauline Hallam, Legal Representative

Provided are a method, system, and article of manufacture for error checking addressable blocks in storage. Addressable blocks of data are stored in a storage in stripes, wherein each stripe includes a plurality of data blocks for one of the addressable blocks and at least one checksum block including checksum data for the addressable block. A write request is received to modify data in one of the addressable blocks. The write and updating the checksum are performed in the stripe having the modified addressable block. An indication is made to perform an error checking operation on the stripe for the modified addressable block in response to the write request, wherein the error checking operation reads the data blocks and the checksum in the stripe to determine if the checksum data is accurate. An error handling operation is initiated in response to determining that the checksum data is not accurate.

Error checking addressable blocks in storage

Provided are a method, system, and article of manufacture for error checking addressable blocks in storage. Addressable blocks of data are stored in a storage in stripes, wherein each stripe includes a plurality of data blocks for one of the addressable blocks and at least one checksum block including checksum data derived from the data blocks for the addressable block. A write request is received to modify data in one of the addressable blocks. The write and updating the checksum are performed in the stripe having the modified addressable block. An indication is made to perform an error checking operation on the stripe for the modified addressable block in response to the write request, wherein the error checking operation reads the data blocks and the checksum in the stripe to determine if the checksum data is accurate. An error handling operation is initiated in response to determining that the checksum data is not accurate.

A method is disclosed to set signal compensation settings for a data storage device comprising a first port and a second port, where that first port is interconnected to a first switch via a first communication pathway having a predetermined first length. The method determines first signal compensation settings based upon the first length.

Apparatus and method to set signal compensation settings for a data storage device

The advanced management module services in a data processing system are configured to determine the system load and provide an input to the early power off warning detection logic that evaluates the power system state to detect a condition when power resources are insufficient to maintain the write caching storage system power within defined acceptable limits. The early power off warning detection logic generates a notification based on the system load and the available power supply resources to maintain maximum availability and reliability characteristics.

Shared power domain dynamic load based power loss detection and notification

Single shared power domain dynamic load based power loss detection and notification

A memory system has mechanisms for scavenging capacity of a super capacitor by removing, or reducing, system load from the super capacitor when the super capacitor voltage decays below a low threshold. The mechanisms then restore the system load to the super capacitor when the super capacitor voltage ramps back above a high threshold. A controller may reduce system load by placing a volatile memory system in a standby state and disabling a field effect transistor to remove power from a non-volatile memory system. A controller may adjust the high threshold and/or a low threshold by setting a digitally controlled potentiometer in a threshold detect circuit via an IC bus.

Extending and scavenging super-capacitor capacity

An apparatus and method are disclosed to configure, format, and test, a data storage subsystem product. The method supplies a data storage subsystem product comprising one or more host computer ports, a processor, one or more data storage device ports, and one or more data storage devices interconnected to the one or more data storage device ports. The method further supplies a configuration appliance comprising a storage configuration. The method connects the configuration appliance to one of the one or more storage device ports, boots up the data storage subsystem product, discovers the configuration appliance by the data storage subsystem product, imports storage configuration data into the data storage subsystem product, formats the one or more data storage device, and tests the input and output data transfer rates for the data storage subsystem product, wherein the formatting and testing are initiated concurrently.

Apparatus and method to configure, format, and test, a data storage subsystem product

Provided are a method, system, and article of manufacture for updating metadata in a logical volume associated with a storage controller. A data structure is generated indicating data units in a volume whose metadata is to be updated. An operation is initiated to update the metadata for data units indicated in the data structure. Indication is made in the data structure that the metadata for one data unit has been updated in response to updating the metadata for the data unit. An Input/Output (I/O) request is received to one data unit in the volume while the metadata for the data units indicated in the data structure is being updated. A determination is made, in response to the I/O request, from the data structure whether the metadata for the requested data unit was updated. The metadata for the requested data unit is updated in response to determining that the metadata for the requested data unit has not been updated. The I/O request is executed against the requested data unit.

Updating metadata in a logical volume associated with a storage controller for data units indicated in a data structure

A method, system and computer-usable medium are disclosed for providing management of serial attached small computer system interface (SAS) storage devices. A host computer comprises a storage controller connected to a SAS port expander comprising a plurality of ports that are logically assigned to target storage devices. The device ports of all storage devices physically attached to the SAS port expander are bypassed to remove their logical SAS expander port assignments. The storage controller unbypasses the device ports, allowing it to recognize the presence of all physically attached storage devices. The recognized storage devices are inventoried and storage devices that are not logically assigned a SAS expander port are designated as being spare storage devices. SAS expander ports are logically assigned to the non-spare storage devices and SAS storage operations are performed.

System and method of maximization of storage capacity in a configuration limited system

A mechanism is provided for autonomic component service state management for a multiple function component. The mechanism determines whether independent functions within a multiple function service boundary can be serviced. When a single function experiences a failure that requires service, repair, or replacement, the surviving functions notify the service management software of the state of the independent functions. The service management software then determines the state of the overall component and implements the appropriate service method.

Autonomic component service state management for a multiple function component

A mechanism for in situ verification of capacitive power support is provided. A memory system uses a super capacitor to support a voltage rail when input power is lost or interrupted. The voltage discharge curve is a function of load and capacitance of the component. By stepping the regulated power supply to a lower output within the voltage range and recording voltage and current draw at the super capacitor as it discharges to the new regulator output voltage, the super capacitor holdup capability can be tested.

In situ verification of capacitive power support

An I/O module includes a switch module, a redundant array of independent disks (RAID) controller and a baseboard management controller (BMC). A first address for a first component of the plurality of components is received. The first address is provided by a user. The switch module is queried for additional addresses for additional components of the plurality of components. The switch module obtains the additional addresses for the additional components from a first persistent storage location associated with the switch module. The first and additional addresses for the first and additional components are stored in a second persistent storage location accessible by the BMC, the switch module, and the RAID controller. Synchronization of the first and additional addresses for the first and additional components in the second persistent location is controlled by the BMC.

Component discovery in multi-blade server chassis

A method, system and computer program product for minimizing read response time in a storage subsystem including a plurality of resources is provided. A middle logical block address (LBA) is calculated for a read request. A preferred resource of the plurality of resources is determined by calculating a minimum seek time based on a closest position to a last position of a head at each resource of the plurality of resources, estimated from the middle LBA. The read request is directed to at least one of the preferred resource or an alternative resource.

Minimization of read response time

To ensure integrity of non-volatile flash, the controller programs the non-volatile memories with background test patterns and verifies the non-volatile memories during power on self test (POST) operation. In conjunction with verifying the non-volatile memories, the controller may routinely run diagnostics and report status to the storage controller. As part of the storage controller power up routines, the storage controller issues a POST command to the controller via an IC register that is monitored by the storage controller. The storage controller may determine that the non-volatile flash is functional without any defects, and the controller may remove power from the non-volatile flash to extend its reliability. Periodically, in the background, the controller may run diagnostic routines to detect any failures associated with the volatile memory and the controller itself.

Verifying data integrity of a non-volatile memory system during data caching process

A method of dynamic allocation of non-volatile memory in a cache storage subsystem includes constraining a redundant array of independent disks (RAID) 6 array in an unavailable state, the RAID 6 array having been newly created in the subsystem, destaging data from a write cache to a storage medium to free memory space, reserving the freed memory space for allocation to data-persistent storage, allocating the memory space to an adapter in the subsystem as a target for data in the event of a power loss, and changing the RAID 6 array to an available state. A system for dynamic allocation of non-volatile memory in a cache storage subsystem includes a computer processing device which constrains a newly-created redundant array of independent disks (RAID) 6 array in an unavailable state to execute a reconfiguration method.

System and method of dynamic allocation of non-volatile memory

Growing community of inventors

Tucson, AZ, United States of America

Robert Akira Kubo