Hughes Aircraft Company

Robert A Metzger

William E Stanchina

David B Rensch

Madjid Hafizi

Adele E Schmitz

Loi D Nguyen

Mark Lui

Charles W Slayman

April S Brown

Loren G McCray

Joseph A Henige

A high speed diode with a low forward-bias turn-on voltage is formed by a heterojunction between a layer of doped semiconductor material that has a narrow bandgap energy of not more than about 0.4 eV, and a layer of oppositely doped semiconductor material that has a substantially wider bandgap energy. The device operates with a lower turn-on voltage than has previously been attainable, despite lattice mismatches between the two materials that can produce strain and substantial lattice dislocations in the low bandgap material. The two materials are selected so that the valence and conduction band edge discontinuities at the heterojunction enable a forward carrier flow but block a reverse carrier flow across the junction under forward-bias conditions. Preferred material systems are InAs for the narrow bandgap material, InGaAs for the wider bandgap material and InP for the substrate, or AlSb for the wider bandgap material and GaSb for the substrate. A compositional grading can be provided at the heterojunction to reduce energy band spikes, and a region of low dopant concentration is included in the wider bandgap material to increase the diode's reverse-bias breakdown voltage.

Heterojunction diode with low turn-on voltage

An electrical junction is precisely located between a highly p doped semiconductor material and a more lightly n doped semiconductor material by providing a lightly p doped buffer region between the two materials, with a doping level on the order of the n doped material's. The buffer region is made wide enough to establish an electrical junction at approximately its interface with the n doped material, despite a diffusion of dopant from the p doped material. When applied to a heterojunction bipolar transistor (HBT), the transistor's base serves as the heavily p doped material and its emitter as the more lightly n doped material. The buffer region is preferably employed in conjunction with a graded superlattice, located between the buffer and emitter, which inhibits dopant diffusion from the base into the emitter. A p-n junction is formed within the superlattice, which functions on one side as an electrical extension of the emitter and on the other side as an electrical extension of the buffer, and establishes the electrical junction at the p-n junction location. The precise positioning of the electrical junction results in a known and repeatable emitter-base turn-on voltage.

Electrical junction device with lightly doped buffer region to precisely

A gain-stable npn heterojunction bipolar transistor includes a graded superlattice between its base and emitter consisting of multiple discrete periods, with each period having a layer of base material and another layer of emitter material. The thicknesses of the base material layers decrease while the thicknesses of the emitter material layers increase in discrete steps for each successive period from the base to the emitter. The thickness of each period is preferably at least about 20 Angstroms, with the superlattice including more than five periods. The superlattice is preferably doped to establish an electrical base-emitter junction at a desired location. The graded superlattice inhibits the diffusion of beryllium p dopant from the base into the emitter during transistor operation, thus stabilizing the device's gain and turn-on voltage.

Gain-stable NPN heterojunction bipolar transistor

A donor layer (17) including an undoped wide bandgap material (14) and an n-type dopant (16) is deposited on a substrate (12) by molecular beam epitaxy (MBE) at a first temperature which is high enough for optimal growth of the donor layer (17). The dopant (16) is silicon or another material which exhibits surface segregation in the wide bandgap material (14) at the first temperature. An undoped spacer layer (18) of the wide bandgap material is deposited on the donor layer (17) at a second temperature which is sufficiently lower than the first temperature that surface segregation of the dopant material from the donor layer (17) into the spacer layer (18) is substantially suppressed. A channel layer (20) of a narrow bandgap material is formed on the spacer layer (18) at a third temperature which is higher than the second temperature and selected for optimal growth of the channel layer (20). The spacer layer (18) is substantially undoped, and the low temperature growth and reduction of donor movement reduces ionized impurity scattering in the channel layer (20).

Method of fabricating inverted modulation-doped heterostructure

The tone or polarity of a patterned layer such as a photoresist mask on an integrated circuit or device substrate is reversed with substantially perfect alignment. A liquid planarizing layer is formed and hardened onto the patterned layer and underlying substrate, filling in spaces between pattern areas. The planarizing layer is then etched to a sufficient depth to expose the patterned layer. Finally, the patterned layer is dissolved away, leaving the reversed tone image which is constituted by the planarizing material in the spaces which were filled in. Modified embodiments enable large spaces between original pattern areas to be effectively reversed, and multi-level reversed tone images to be formed in which the reversed tone layers are thicker than the original layers.

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Thousand Oaks, CA, United States of America

Robert A Metzger