National Semiconductor Corporation

Robert A Cometta

Daniel D Culmer

James B Compton

An integrated circuit includes a plurality of circuit elements interconnected to operate as a circuit and formed in a common semiconductor substrate. The substrate is mounted on a supporting package, resulting in a mechanical stress in the substrate which is symmetrical about at least one given axis. At least the circuit elements with operating characteristics which are altered by the mechanical stress and which have a critical matching or ratio relationship are arranged symmetrically about the stress axis of symmetry. In a preferred form, the integrated circuit is a linear circuit, such as an operational amplifier employing junction field effect transistors (JFETs) for its input stage and bipolar transistors for its amplifier stage. Providing device symmetry about an axis of mechanical stress symmetry enables shifts in input offset voltage for such operational amplifiers to be reduced up to a factor of about 10.

Stress insensitive integrated circuit

An element of an integrated circuit, such as an ion implanted region or a metal layer, may be laser trimmed without exposing P-N junctions or other circuit elements not to be trimmed to damage by the laser through use of the present protection process and structure. In the process, an oxide through which the laser trimming is carried out is formed over a selected portion of the circuit to be trimmed by the laser. A bare layer of a metal reflective to the laser radiant energy beam, such as aluminum, gold or silver, is formed surrounding the selected portion of the circuit. The selected portion of the integrated circuit is then trimmed with the laser. The oxide promotes trimming in the selected area by absorbing the laser radiant energy beam. The bare metal layer protects the portion of the integrated circuit underlying it by reflecting most of its energy.

Laser trim protection process and structure

In a monolithic integrated circuit having a combination of bipolar and junction field effect transistors, a pulsed laser is employed to trim the transistors to achieve balanced circuit performance. The laser is applied to individual circuits in wafer form using a step and repeat operation. Each circuit is measured, the transistor to be trimmed determined and a first trim performed. The circuit is remeasured and, if still out of specification, retrimmed. The process is repeated until a desired degree of balance is achieved.

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San Jose, CA, United States of America

Robert A Cometta