Infineon Technologies Ag

Lantiq Deutschland Gmbh

Rivka Blum

Meny Yanni

Yoav Lavi

Haim Granot

Robert Knuth

Amnon Rom

Anat Hershko

Georgiy Shenderovitch

Eran Weingatren

Elliot Cohen

Amnon c/o IC Com Rom

Georgy Shenderovitch

A method for executing instructions in a data processor and improvements to data processor design, which combine the advantages of regular processor architecture and Very Long Instruction Word architecture to increase execution speed and ease of programming, while reducing power consumption. Instructions each consisting of a number of operations to be performed in parallel are defined by the programmer, and their corresponding execution unit controls are generated at compile time and loaded prior to program execution into a dedicated array in processor memory. Subsequently, the programmer invokes reference instructions to call these defined instructions, and passes parameters from regular instructions in program memory. As the regular instructions propogate down the processor's pipeline, they are replaced by the appropriate controls fetched from the dedicated array in processor memory, which then go directly to the execution unit for execution. These instructions may be redefined while the program is running. In this way the processor benefits from the speed of parallel processing without the chip area and power consumption overhead of a wide program memory bus and multiple instruction decoders. A simple syntax for defining instructions, similar to that of the C programming language is presented.

Configurable long instruction word architecture and instruction set

A method for insertion of a dynamic number of implicit nop instructions by the microprocessor at run-time. The implicit nop instructor is a no operation instruction which is executed by the microprocessor without placing an actual nop instruction in the program itself. The method of the present invention enables the appropriate number of implicit nop instructions to be automatically calculated and executed for every occurrence of a multi-cycle instruction. Hereinafter, the term automatically refers to a process which occurs without the direct intervention of the programmer or higher-language compiler. The appropriate number of implicit nop instructions is automatically calculated by the microprocessor, by subtracting the number of IDSI from the total number of delay-slots which are required. The number of IDSI is preferably determined by the assembler, and then made available to the microprocessor. More preferably, this number is placed in a delay-slot field in the coded instruction by the assembler, and is then retrieved from the delay-slot field by the microprocessor. Thus, the method of the present invention enables the microprocessor to automatically insert the required number of implicit nop instructions, without requiring extra memory resources and without forcing the programmer or higher-language compiler to insert nop instructions into each unused delay-slot.

Delay-slot control mechanism for microprocessors

Growing community of inventors

Azor, Israel

Rivka Blum