Intel Corporation

Riley W Jackson

James P Kardach

Richard A Forand

Vivek G Gupta

Gunner D Danneels

Jeffrey L Huckins

Uma M Gadamsetty

Brian V Belmont

Muthu K Kumar

Kristoffer Fleming

Kristoffer D Flemming

An apparatus is provided that includes a microcontroller to facilitate data communication within a system comprising a plurality of peripheral devices, a power manager to put the microcontroller into a sleep state to save power, and an I/O controller to enable communication between two or more particular peripheral devices in the plurality of peripheral devices without involvement of the microcontroller while the microcontroller is in the sleep state. The microcontroller is to wake from the sleep state in response to at least one signal from a component of the system external to the microcontroller and communication between at least some of the plurality of peripheral devices is facilitated using the microcontroller when in an awake state.

Non main CPU/OS based operational environment

A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.

A computer includes a wireless personal area network (WPAN) interface, a wireless local area network (WLAN) interface and a wireless wide area network (WWAN) interface. A device communicating with the wireless personal area network can command the computer to perform actions using the wireless local area network interface or wireless wide area network interface.

Remote operations using wireless personal area network

A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one or more components of the computing system are inactivated so as to cause the computing system to consume less power in the main CPU/OS based state than in the normal on state. The computing system is able to execute software application routines on a main CPU and a main OS of the computing system while in the main CPU/OS based state.

Computing system with operational low power states

Computing system with low power states and proxy for integration with legacy application software

A computing system is described that includes an I/O unit interface that is deactivated while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit that is coupled to both the I/O unit interface and the controller.

Growing community of inventors

Portland, OR, United States of America

Riley W Jackson