Intel Corporation

Ridvan A Sahan

Rahima K Mohammed

Prabhakar Subrahmanyam

Ying-Feng Pang

Tong Wa Chao

David W Grawrock

Jun Lu

Bruce Querbach

Tieyu Zheng

Keshavan K Tiruvallur

Mark B Trobough

Chinna B Prudvi

Vui Yong Liew

Hermann Gartler

Ashok N Kabadi

Samie B Samaan

Keith A Drescher

Jay Joseph Nejedlo

Mukesh Kataria

Lyle E Cool

Russell J Wunderlich

James J Grealish

Brian Meyer

Mustafa H Haswarey

Abhijit Davare

Priyadarsan Patra

Yi Xia

William Penner

Liguang Du

Victor Polyanko

Guoliang Ying

Guangying Zhang

Arun R Ramadorai

Kapila B Udawatta

Wee Hoo Cheah

Yuen Tat Lee

John L Baudrexl

Kyle Markley

Christian E Iovin

Aslam H Haswarey

Loren James McConnell

Kip C Killpack

Timothy S Storey

Yi Amy Xia

Edwin E Parks

Padmakumar Gopal

Sanjay S Salem

David C Florey

Travis K Goff

Stephanie L Seaman

Evan J Halprin

Jiun Long Foo

Selvakumar Raja Gopal

Chuanlou Wang

Peng Wei

Xiang Que

Neil Dobler

Nagib Z Hakim

Techniques for heat sinks and cold plates for compute systems are disclosed. In one embodiment, a heat sink includes two sub-heat sinks that are mechanically connected but thermally isolated. The two sub-heat sinks can independently cool different dies on the same integrated circuit component. In another embodiment, a system includes an integrated circuit component that is cooled by a first water block and a second water block. The first water block forms a loop with a gap in it, and the second water block has a pedestal that extends through the gap in the first water block to contact the integrated circuit component. The first water block and the second water block can independently cool different dies on the same integrated circuit component.

Technologies for isolated heat dissipating devices

Reconfigurable cooling assemblies for thermal management of integrated circuitry are provided. Such assemblies can be modular and can permit or otherwise facilitate scalable thermal performance with respect to power dissipation demands. In some embodiments, a reconfigurable modular cooling assembly can be reversibly configured to adjust reversibly the cooling capacity of the assembly for a defined power dissipation requirement. A form factor of a reconfigurable modular cooling assembly can be based at least on the defined power dissipation requirement. In some embodiments, a reconfigurable modular cooling assembly can include a pedestal member and multiple attachment members that can be reversibly coupled to or reversibly decoupled from the pedestal based at least on a power dissipation condition and/or a change thereof in a dissipative electronic component included in a semiconductor package. Scalability of thermal performance of the reconfigurable modular cooling assembly can be achieved, at least in part, by the addition of attachment members.

Reconfigurable cooling assembly for integrated circuitry

An apparatus and method is described herein for providing a test, validation, and debug architecture. At a target or base level, hardware hooks (Design for Test or DFx) are designed into and integrated with silicon parts. A controller may provide abstracted access to such hooks, such as through an abstraction layer that abstracts low level details of the hardware DFx. In addition, the abstraction layer through an interface, such as APIs, provides services, routines, and data structures to higher-level software/presentation layers, which are able to collect test data for validation and debug of a unit/platform under test. Moreover, the architecture potentially provides tiered (multiple levels of) secure access to the test architecture. Additionally, physical access to the test architecture for a platform may be simplified through use of a unified, bi-directional test access port, while also potentially allowing remote access to perform remote test and debug of a part/platform under test. In essence, a complete test architecture stack is described herein for test, validation, and debug of electronic parts, devices, and platforms.

Test, validation, and debug architecture

The present description relates to the field of microelectronic device retention mechanisms and, more particularly, to a quick release retention mechanism including a base plate, a load plate and a biasing mechanism adapted to apply a desired load and to allow rapid insertion and extraction of microelectronic devices from sockets.

Quick release retention mechanism for socketed microelectronic devices

Growing community of inventors

Sunnyvale, CA, United States of America

Ridvan A Sahan