Microsoft Technology Licensing, LLC

Richard Wurdack

Gad Shlomo Sheaffer

Jan Stephen Gray

Martin Taillefer

Ali-Reza Adl-Tabatabai

Peter Lachner

Darek Josip Mihocka

Barry M Nolte

Maxim Goldin

Mahlon David Fields

Steven M Carroll

Ali-Reza Adl Tabatabai

Monitoring performance of one or more architecturally significant processor caches coupled to a processor. The methods include executing an application on one or more processors coupled to one or more architecturally significant processor caches, where the application utilizes the architecturally significant portions of the architecturally significant processor caches. The methods further include at least one of generating metrics related to performance of the architecturally significant processor caches; implementing one or more debug exceptions related to performance of the architecturally significant processor caches; or implementing one or more transactional breakpoints related to performance of the architecturally significant processor caches as a result of utilizing the architecturally significant portions of the architecturally significant processor caches.

Instrumentation of hardware assisted transactional memory system

Debugging software in systems with architecturally significant processor caches. A method may be practiced in a computing environment. The method includes acts for debugging a software application, wherein the software application is configured to use one or more architecturally significant processor caches coupled to a processor. The method includes beginning execution of the software application. A debugger is run while executing the software application. The software application causes at least one of reads or writes to be made to the cache in an architecturally significant fashion. The reads or writes made to the cache in an architecturally significant fashion are preserved while performing debugging operations that would ordinarily disturb the reads or writes made to the cache in an architecturally significant fashion.

Debugging mechanisms in a cache-based memory isolation system

Cross session process actions such as diagnostics in which a diagnostic process running in one process attaches and performs diagnostics on a process running in another session. Upon determining that diagnosis is to be performed on a process of another session, diagnostic process uses an intermediary session to launch diagnostic processes in the target session. Thus, actions such as diagnostics can be initiated across sessions.

Cross session process action

Systems and methods are provided that determine the actual amount of time a processor consumes in executing a code portion. The actual execution time of a code portion may be accurately determined by taking into consideration context switches and/or overhead time corresponding to the code portion. Determining the actual execution time of a code portion may include recording context switches and time values that occur during the execution of the code portion. This information along with overhead measurements may be used to generate the actual execution time of a code portion, as will be described in more detail below. For example, the switched-out intervals resulting from the context switches and the overhead time associated with the time measurements may be subtracted from the elapsed time to produce the actual execution time of a code portion.

Determining an actual amount of time a processor consumes in executing a portion of code

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Richard Wurdack