Alcatel Network Systems, Inc.

Richard W Peters

William B Weeber

William E Powell

William H Stephenson, Jr

Richard Marion Czerwiec

Joseph E Sutherland

Timothy J Williams

Joseph Lee Smith

Michael J Gingell

Claude M Hurlocker

Ertugrul Baydar

Raymond E Tyrrell

Dale L Krisher

William J Fox

Gus C Sanders, Jr

Richard J Sanders, Jr

Stephen C Dunning

Hal A Thorne

Francis G Noser

Jak Yaemsiri

Keith L Bernhardt

Jeffrey P Jones

Camille A Abu-Saba

Michael Sutton

O Lamar Bishop

M Rodney Briscoe

Kenneth J Stoia

V Paul Runyon

Heinrich T Sonnenberg

Patrick M Farrell

Victor W Wilkerson

Mohammad S Arani

Dana Merrill

Wenkwei Rou

A bit resolution phase detector can be realized for a parallel elastic store by comparing a write bit clock and a read bit clock to determine when stuff bits are required; upon detection of phase alignment between the write and read clocks, the phase detector will output a signal which will enable the insertion of a data bit into the stuff opportunity bit and cause the write clock to lag the read clock by one bit period.

Phase detector for elastic store

N-parallel bits of data are input to a parallel in-parallel out shift register made of n+m n:1 parallel multiplexers and n-parallel bits of either pure data or combined stuff and data bits are output where, for cycles in which stuff bits are inserted, the non-outputted outputted data bits are recirculated for output on a subsequent cycle followed by newly incoming data bits; such is shown used to advantage in a bit stuffing technique where a synchronous payload envelope pattern may be started at a selected location in a synchronous transport signal frame by monitoring a frame starting signal and providing a pattern starting signal at a selected point after the occurrence of the frame starting signal.

N-bit parallel input to variable-bit parallel output shift register

A synchronous optical transmission system for interfacing SONET formatted channels to lower speed channels in either a SONET format or otherwise. The transmission system incorporates a fiber transmission system, terminal multiplexers and add/drop multiplexers that in turn incorporate a plurality of features, such as parallel scrambling circuitry, frame synchronization circuitry and the like.

Synchronous optical transmission system

A parallel frame synchronization circuit converts an incoming serial bit stream containing frame synchronization information into parallel data words on arbitrary boundaries of fixed bit length. Detectors forming part of the present invention determine from the parallel converted data the presence of synchronization information so as to align the incoming serial data into parallel data aligned on frame boundaries by manipulating parallel words. The present invention is particularly suited for fabrication in complimentary metal oxide silicon (CMOS) technology and in a preferred embodiment is used to synchronize incoming data comporting to the synchronous optical network (SONET) telecommunication standard.

Parallel bit detection circuit for detecting frame synchronization

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Raleigh, NC, United States of America

Richard W Peters