Texas Instruments Corporation

Richard Turkson

Jae Won Choi

Sungho Beck

Johnny Klarenbeek

Bixia Li

Aline Claude Sadate

A power source multiplexer includes a first switch circuit connected between a first input voltage source node and an output voltage node. A second switch circuit is connected between a second input voltage source node and the output voltage node. A driver circuit is configured to provide a steady-state current to drive one of the first or second switch circuits to electrically connect the respective input voltage source node to the output voltage node. A boost circuit is configured to boost the steady-state current for a switching time interval when switching from one of the input voltage source nodes being connected to the output node to the other of the input voltage source nodes being connected to the output voltage node.

Power source multiplexer with adaptive switch control

Channel switchover power multiplexer circuits, and methods of operating the same are disclosed. An example power multiplexer a first transistor coupled to a first input, a second transistor coupled to the first transistor to couple a first voltage at the first input to an output, a third transistor coupled to a second input, a fourth transistor coupled to the third transistor to couple a second voltage at the second input to the output, a diode amplifier to provide a third voltage to a gate of the first transistor to block a reverse current, and a soft-start amplifier to provide a fourth voltage to a gate of the fourth transistor to turn on (with adjustable VOUT ramp rate) the fourth transistor with a constant ramp rate.

Channel switchover power multiplexer circuits, and methods of operating the same

A system includes a storage capacitor coupled between an input voltage source and a ground terminal, a voltage sensing circuit coupled to the input voltage source and to the storage capacitor, a first transistor coupled to the voltage sensing circuit, a current mirror circuit coupled to the first transistor, a diode coupled between the storage capacitor and the current mirror circuit, and a second transistor configured to couple between a gate of a power switching device and the ground terminal. A gate of the second transistor is coupled to the storage capacitor by way of the voltage sensing circuit.

Turn-off of power switching device

The disclosed transistor switching methodology enables independent control of transistor turn-on delay and slew rate, including charging, during a pre-charge period, a transistor control input to a threshold voltage Vwith a predetermined turn-on delay; and then charging, during a switch-on period, the transistor control input from Vto an operating point with a predetermined slew rate. This methodology is adaptable to load switching applications, for example, to control a high side/low side load switch such that, during the switch on period, the output voltage supplied to the load rises from zero volts to an operating load voltage with the predetermined slew rate. In one embodiment, I_delay and I_slew_rate currents are used to charge the transistor control input respectively during the pre-charge and switch-on periods. In another embodiment, the I-delay and I-slew rate currents are controlled by a replica switch with a control input coupled to the control input of a main switch, with the replica switch characterized by a threshold voltage substantially identical to the main switch threshold voltage V.

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Princeton, TX, United States of America

Richard Turkson