Mips Technologies, Inc.

Richard T Leatherman

Radhika Thekkath

Franz Treue

Ernest Lewis Edgar

A method for tracing a multi-tasking embedded pipelined processor includes executing compiled code including trace controls. Tracing is initiated when the execution of the compiled code is initiated. Tracing is stopped when execution of the compiled code is completed. A trace record is formed during tracing. The trace record includes a processor mode indication, application space identity value and an instruction architecture set mode indication.

External trace synchronization via periodic sampling

A system and method for program counter and data tracing is disclosed. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core.

A system and method for program counter and data tracing is disclosed. Generated trace messages are included within a trace word format and stored in trace memory, thereby enabling a reduction in the amount of trace storage required.

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Portland, OR, United States of America

Richard T Leatherman