Harris Corporation

Harris Global Communications, Inc.

Richard Schmalbach

John Blessing

Terence W O'Brien

Jeffrey L Murray

George P Paskalakis

Charles Alan Linn

Bruce T Borsa

Christopher J Tilley

Jeff Wroten

Jeffrey R Beane

Charles A Linn

Jeffrey Irvin Murray

O`Brian Terence William William

Jeffrey Murray

Systems () and methods () for routing packets within a Multi-Channel Communications Device ('MCCD'). The methods involve receiving a first packet () which has a first classification level and a second packet () which has a second different classification level. Subsequently, modified first and second packets () are generated by inserting routing headers () between data link layer protocol headers () and network layer protocol headers () of the first and second packets. Each routing header comprises an error-detecting code () and routing information () describing a route within the MCCD along which the first or second packet is to travel. The routing headers are then used by a single packet router () to simultaneously route the modified first and second packets through the MCCD to at least one port of a plurality of output interface ports () of the MCCD.

High assurance packet router

Systems () and methods () for synchronizing operations of processors (). The methods involve: receiving by an electronic circuit () a first request () from a first processor for writing first data () to or reading first data from a first address () in a first data store (), and subsequently a second request () from a second processor for writing second data () to or reading second data from a second address () in a second data store (); comparing values of the first and second addresses to each other and values of the first and second data to each other; and concurrently communicating an asynchronous ready signal () from the electronic circuit to the processors when the values of the addresses and data respectively match each other. The asynchronous ready signal causes operations of the processors to be synchronized in time with each other.

Systems and methods for synchronizing microprocessors while ensuring cross-processor state and data integrity

A secure file service includes a cryptographic processor () and a secure file system (). The cryptographic processor is comprised of a trusted microprocessor and a trusted operating system executing on the trusted cryptographic processor. The cryptographic processor includes hardware and software for accessing at least one classified data file from the secure file system, decrypting the classified data file, and serving the classified data file in decrypted form to a secure user processor () that has requested the file. The secure file system can be either a single-level secure file system () or a multi-level secure file system ().

Computer architecture for an electronic device providing a secure file system

Method for providing a single level secure (SLS) user processor () with access to a multi-level secure (MLS) file system (). The method begins by authenticating a user to a cryptographic processor () by communicating one or more types of user authentication information to the cryptographic processor. Based on such authentication, the MLS file system services are provided such that the SLS user processor () has access to files () at only one defined security classification level at a time. The method also includes zeroizing one or more data stores used by the SLS user processor each time the SLS user processor transitions between accessing classified data files at a first security classification level and a second security classification level.

Computer architecture for an electronic device providing single-level secure access to multi-level secure file system

System for providing a secure file service includes an MLS file service module () comprised of a cryptographic processor (). The MLS file service module also includes an MLS file system () hosted by the cryptographic processor. A secure user processor () includes programming and communications hardware for requesting at least one classified file from the MLS file service module. The cryptographic processor includes cryptographic hardware and software to decrypt the classified file. The cryptographic processor is also performs an integrity check on the classified file. Once the file is decrypted and its integrity checked by the cryptographic processor, the MLS file service module serves the classified file to the secure user processor in decrypted form. If the classified file is an executable file, the method also includes selectively enabling a write function for program memory of the secure user processor. This write function is disabled immediately after the classified executable file has been loaded into the program memory to guard against self modifying programs.

Computer architecture for an electronic device providing SLS access to MLS file system with trusted loading and protection of program execution memory

Mobile PDA computer system () includes a secure user processor (), a non-secure user processor (), a cryptographic engine (), and a shared human/machine interface (HMI) (). The secure user processor () can be comprised of a first trusted microprocessor and a first trusted operating system executing on the first trusted microprocessor. The non-secure user processor () can be comprised of a second non-trusted microprocessor and a second non-trusted operating system executing on the second non-trusted microprocessor. A cryptographic engine () can be comprised of a third trusted cryptographic processor and a third trusted operating system executing on the third trusted cryptographic processor. The cryptographic engine can be configured for encrypting and decrypting data. A first data communication link () communicates data between the secure user processor and the cryptographic engine. A second data communication link () communicates data between the cryptographic engine and the non-secure user processor. In this way, the cryptographic engine forms a bridge between the secure user processor and the non-secure user processor. An HMI () comprised of trusted hardware for user input and output is time-multiplex-shared among the secure user processor (), the non-secure user processor (), and the cryptographic engine () in a secure fashion.

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Timonium, MD, United States of America

Richard Schmalbach