Norlin Industries, Inc.

Norlin Music, Inc.

Other

Richard S Swain

Douglas R Moore

Mark J Fimoff

Richard C Rice

Gene S Morez

Barry N Horn

An electronic musical instrument includes a keyboard having a plurality of keys, each depressed key being identified by a uniquely developed multibit code. Each of a plurality of tone generators, substantially less in number than the number of keys characterizing the keyboard, is operable in response to each of the multibit codes for producing a tone signal having a frequency corresponding to the pitch of the associated depressed key. Each depressed key is assigned for playing through one of the tone generators by a control circuit, the control circuit being responsive to the condition wherein all of the tone generators have been assigned to previously played keys for assigning a newly played key for playing through the tone generator which was assigned to the oldest released one of the previously played keys.

Tone generator assignment system for an electronic musical instrument

An electronic musical instrument includes a programmed microprocessor for controlling selected functions of the instrument and a plurality of key and tab switches responsive to a scan control signal repetitively scanning the switches for developing a serial data signal defining operated key and tab switches during each of the scans. An interface circuit is interposed between the key and tab switches and the microprocessor for developing the scan control signal and for receiving the resulting serial data signal. The serial interface circuit includes means for converting the received serial data into a number of first multibit words each representing a depressed key and a number of second multibit words each bit of which represents the operational condition of a respective one of the tab switches. The first and second multibit words are stored in a RAM in a compressed format, the RAM being enabled for coupling its contents in parallel form to the microprocessor in response to two consecutive scans of the key and tab switches resulting in the development of identical serial data signals immediately preceded by a scan resulting in the development of a serial data signal different therefrom. The interface circuit also includes means for converting data words coupled to the RAM from the microprocessor into a corresponding serial data output signal.

Serial interface circuit for an electronic musical instrument

An improved system for increasing the loudness of any single note selected by playing more than a single key. A command circuit responsive to manual control, including stop tabs, enables a tone signal to be produced in response to the playing of one key or in response to the simultaneous playing of a plurality of keys on a keyboard. Means are provided for changing the relative amplitude of a tone signal produced in response to the simultaneous playing of a plurality of keys with respect to the amplitude of a tone signal produced in response to the playing of a single key.

Apparatus for reinforcing notes selected by more than one key

Apparatus for generating an output signal having a frequency and duty cycle controllable in response to a pair of binary control words. The apparatus includes a pair of counters which are alternately enabled for counting high frequency clock pulses for respective time durations determined according to the two binary control words. A bi-stable device is controlled by the counters for developing the output signal which alternates between two levels for time durations corresponding to the time periods during which the two counters are enabled. The frequency and duty cycle of the output signal are therefore controllable by suitably adjusting the values of the two binary control words.

Programmable frequency and duty cycle tone signal generator

An automatic rhythm generator for use in an electronic organ is made more efficient, from the standpoint of rhythm pattern storage, by use of a zero suppression technique. Null instructions, the sole function of which is to allow a clock interval to pass without sounding an audible beat, are eliminated entirely from storage, and thus do not consume any memory capacity. In order to skip the necessary silent clock intervals before the next audible beat, each beat instruction which is stored at a memory address may include an encoded skip instruction commanding a number of clock intervals to be skipped before passing on to the next beat instruction at the next memory address. Alternatively, the skip instruction, in a stored program instrument, may come from software. In either case, the skip instruction controls a programmable frequency divider, which causes clock interval skipping by dividing down the clock frequency to a lower rate before it reaches the memory address counter. The number of clock intervals skipped, for a frequency division ratio of n, is n-1. Thus, a frequency division ratio of one causes zero clock intervals to be skipped. A maximum frequency division ratio of four, encoded in a two-bit word, skips three clock intervals, which is adequate for all practical situations.

Automatic rhythm generator

This invention relates to tone generating systems for polyphonic electronic musical instruments. The system includes a plurality of programmable tone generators each of which is assigned to a different note to be sounded. For a preferred embodiment, one of the programmable tone generators is designated as a solo high tone generator, and is always utilized to produce the highest note to be sounded. Another generator may be designated as the solo low generator, and will always be utilized to generate the lowest note to be sounded. Additional solo note generators may be provided if desired. Tone generators are interconnected in a priority scheme with one generator at a time being designated as the next generator to be assigned a note to be sounded, and the designation being advanced in a predetermined manner as notes are assigned successively to the generators. One or more keyers are associated with each programmable tone generator, and receive a keyer enable signal from the tone generator when a note to be sounded is stored therein. Each generator also generates one or more pulse code outputs to its corresponding keyers, programming them to adapt to the selection of musical notes over a multi-octave range. Phase cancellation between two notes which are octavely related is avoided by duplicate generation of one of the notes in both master and slave tone generators, the code for any note being stored in both the master and slave generators whenever it is determined that the code for an octavely related note is already stored in another master generator. Various special effects are achieved by selectively dropping pulses from the clock signal applied to the programmable divider of the generator.

Tone generating system for electronic musical instrument

An electronic musical instrument incorporates a single integrated circuit chip for performing a variety of logical operations for the production of chords and various accompaniment signals automatically, in response to depression of one or two keys within a related portion of the keyboard of the instrument. A multiplexer is employed, in association with the keyboard, to produce a train of signals in response to depression of one or more keys, and one or more function control switches; certain ones of these signals are used to address a plurality of read only memory devices for the generation of the several components needed for the mode of operation which is selected. In an automatic chord mode, a chord is selected automatically, corresponding to an operated key of the keyboard. The chord components include the root, the third (which may be selectively minored), the fifth, the sixth and the seventh (which can be selected or not). The several chord components are mixed in a stair step network for one output signal, amd may selectively be produced individually for an arpeggio or a strum or both.

Electronic musical instrument with means for automatically generating

An encoder providing on a single terminal of a circuit package a composite serial data stream containing both stored data bits of a multistage binary memory and a clock signal needed for decoding the data. A parallel to serial converter serially shifts the stored binary data bits to an output thereof in response to clock pulses of an internal clock, and a logic circuit responsive to both the internal clock and the serial binary data from the converter generates first, second and third signals of amplitudes discernibly different from one another respectively in response to 1-state data bits, 0-state data bits and the termination of clock pulses. Two fixed inputs to the converter respectively provide a 1-state start bit at the beginning of the set of data bits and a 0-state stop bit at the end of the set of data bits for purposes of decoding. An amplitude discriminating decoder uses the periodic third signals and the start and stop bits to decode the serial data.

Multi-level encoding system

A selection switch memory circuit having a priority encoder for providing a code for the highest priority actuated one of a plurality of momentary contact selection switches, a memory for storing the code and a decoder for providing a select signal on one of a plurality of outputs thereof to activate a circuit corresponding to the stored code. A control includes a comparator to determine if the provided code is the same as the stored code. In one embodiment, if the provided and stored codes are the same, the memory is cleared of the stored code, and the circuit corresponding thereto is deactivated. In another embodiment, the decoder is disabled to terminate activation of the previously selected circuit if the provided and stored codes are the same. In both embodiments, if the provided and stored codes are different, the provided code is entered into the memory in lieu of the stored code. Response of the control to switch actuation is delayed to avoid deleterious effects of switch contact bounce.

Selection switch memory circuit

Fire alarm and intrusion alarm conductors are wired from a plurality of dwellings to a nearby data transmitter circuit which is linked by a single pair of conductors to a remote data receiver circuit. The alarm conductors are sequentially scanned in the data transmitter circuit by a binary counter which sequentially enables or opens gates that are coupled to the alarm conductors. When an alarm condition is detected on one of the alarm conductors, the scanning counter is stopped and the counter number is converted from parallel form to serial form. The serial number is transmitted from the data transmitter circuit to the data receiver circuit. The least significant bit of the number signifies whether the alarm is a fire or an intrusion. The remaining bits signify the location. In the receiver circuit, the received data is converted back to parallel form and is printed out on a printer. The transmitted data includes a first bit which is always a binary 1 and a last bit which is always a binary zero. The first bit starts the serial to parallel converter in the receiver circuit and the last bit insures that the output of the parallel to serial converter in the transmitter circuit is left in the low state after the transmission is completed. The data is preferably transmitted from the transmitter circuit to the receiver circuit by frequency shift keying. The data is clocked out of the parallel to serial converter and into the serial to parallel converter by clock pulses which are derived by dividing down the frequency of the frequency shift keying carrier.

Growing community of inventors

Des Plaines, IL, United States of America

Richard S Swain