The United States of America as Represented by the Director of the

Richard P Williams

An apparatus for controllable propagation of magnetic domains, or bubbles, through an arrangement of closely spaced magnetic propagating elements arranged in an input stage, a strip-former stage, and a decoder stage. Binary logic circuitry results from selective control of bubble movement through alternate paths of elements, with at least one of said paths producing a domain strip extending the full height of the strip-former stage. The decoder stage includes a propagating element spaced apart from the strip-former stage a distance sufficient to prevent propagation of all domains in the strip-former stage except for the full-height strip. The asymmetric geometry of the strip former stage makes the full elongation of a bubble dependent upon which input provided the bubble.

Magnetic bubble logic apparatus

An apparatus for controllable propagation of magnetic domains, or bubbles, through an arrangement of closely spaced magnetic propagating elements arranged in an input stage, a strip-former stage, and a decoder stage. Binary logic circuitry results from selective control of bubble movement through alternate paths of elements, with at least one of said paths producing a domain strip extending the full height of the strip-former stage. The decoder stage includes a propagating element spaced apart from the strip-former stage a distance sufficient to prevent propagation of all domains in the strip-former stage except for the full-height strip.

Compact arrangements of two-input magnetic bubble logic gates providing bubble devices for performing serial integer arithmetic on binary integers are disclosed. Using only a small number of different types of logic gates, designs are given for devices for performing serial addition, subtraction, multiplication and division arithmetic operations on binary integers, represented as sequences of magnetic bubbles. All logical interactions use bubble repulsion to prevent bubbles from transferring to adjacent propagation paths via preferred transitions. By using only two-input gates and a pipeline computational structure, hardware design is simplified and advantage is taken of the inherent serial nature of bubble technology. The simple gate interconnection geometry has a minimum of feedback paths and results in devices which are not burdened with excessive numbers of bubble generators, annihilators or crossovers.

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Richard P Williams