Intel Corporation

Richard P Garner

Steven E Wells

Robert N Hasbun

Terry L Kendall

Virgil N Kynett

Deborah L See

Dave M Brown

Akila Sadhasivan

Phillip J Del Pozo, Iii

Jeffrey A Dunlap

Richard A McGrew

James W Bridgewater

In an embodiment, a method includes receiving a request to download data into flash memory. The method also includes halting the downloading of the data into the flash memory until the flash memory is initialized. The initialization includes storing pointers in a memory to different locations within the flash memory where the data is to be stored. Additionally, the method includes storing the data into the flash memory based on the pointers stored in the memory.

Method and apparatus for storing data in flash memory

A method of performing multiple operations on a flash memory device is described. This is made possible through the implementation of multiple partitions within the flash memory. The partitions are used to store data, application code, and system code. Low level functions within the system code process the data and handle preemption functions within the flash memory.

Implementing a dual partition flash with suspend/resume capabilities

A method of directly reading addresses from flash memory using an object tracking table is described. Some applications such as K-Java typically require their data to be stored contiguous in memory. In order to achieve contiguous memory space, free memory is compressed during reclaim. The data compression may alter the address locations within the application files. The object tracking table helps enable direct flash access to modify and update flash object data.

Method of tracking objects for application modifications

Methods for storing data in an erasable nonvolatile memory are described herein. In one embodiment, an example method includes allocating a space within a block of an erasable nonvolatile memory for an object, wherein the allocated space is within a single block of the erasable nonvolatile memory and the allocated space includes a plurality of areas capable of storing multiple instances of the object, storing a first instance of the object in one of the areas within the allocated space, storing a superseding second instance of the object in another one of the areas within the allocated space without erasing any of the allocated space, and for each of the first and second instances of the object, storing status information corresponding to the respective instance of the object within the allocated space which is within the single block of the erasable nonvolatile memory.

Increased reliability of data stored on flash memory in applications sensitive to power-loss

The present invention is in the field of flash memory. More particularly, embodiments of the present invention can enhance an interface of a flash memory device by increasing the number of operations performed per transmission from a media management system. Further, some embodiments of the invention are designed to interface the flash memory device and media management controller via an interconnection attachment and/or driver common to a second type of data storage device, such as a hard drive.

System and apparatus for increasing the number of operations per transmission for a media management system

A cache memory for operations to a flash memory. A flash memory manager places flash write and flash erase commands into a cache, for subsequent execution by the flash memory. The cache can replace a queue used in conventional flash memory systems. A foreground manager can perform a check for available space in the flash memory, break up the command into appropriate cache entries, and write the entries into the cache. A background manager can subsequently read the entries from cache and execute them to flash memory, deleting each cache entry as it is posted to flash memory. The cache can include multiple sets of tag/data arrays, each dedicated to commands with a particular priority. Relocating most conventional flash management functions from background to foreground can eliminate the possibility of &ldquo;flash full&rdquo; responses from the background manager, thus eliminating the need for the background manager to determine whether space will be available for the command when it is executed to flash.

Posted write-through cache for flash memory

A flash memory in which a memory mapped input/output unit is used to access flash memory data when a particular flash condition is encountered, which condition is not a flash read command instruction to read the flash memory. A control logic is used to access the memory mapped input/output in order to respond to the particular flash condition when the condition is encountered. The memory mapped input/output allows real time access to the flash data without writing a read command to the flash memory.

Method and apparatus to provide real-time access to flash memory features

A method for updating the content of EEPROM memory used for controlling processes run on a microprocessor used to control the operations of a long term memory array which includes moving an update process stored in the EEPROM memory to a random access memory associated with the microprocessor; and then using the update process stored in random access memory for erasing the contents of the EEPROM memory, and furnishing data to the microprocessor on a sector by sector basis from a host computer through an interface used by the microprocessor to provide data to the long term memory array. The data furnished by the host is written sector by sector to the EEPROM memory until the EEPROM memory has been updated.

Method and apparatus for updating flash memory resident firmware through

A flash electrically-erasable programmable read only memory (EEPROM) device including a flash EEPROM array having circuitry for controlling operations within the flash EEPROM array, a microprocessor for controlling operations external to the flash EEPROM array, circuitry for detecting when operations are taking place within the array, and circuitry for disabling the microprocessor during periods in which operations are taking place in the flash EEPROM array so that power use by the microprocessor is minimized.

Method and apparatus for minimizing power consumption in a

A flash electrically-erasable programmable read only memory (EEPROM) array and a method for allowing a host computer to detect a plurality of different power-expending modes into which a storage device may be placed for operation, to select a particular one of those modes to match the power abilities of the host computer, and then to place the storage device in the proper power mode of operation to best function with the host system.

Method and apparatus for managing active power consumption in a

A control circuit for a computer component circuit which includes oscillator apparatus for providing square wave pulses at a prescribed frequency, gating apparatus for providing the square wave pulses at an output terminal for use as a clock for the component circuit, timing apparatus for sensing a period during which the component circuit has not performed an operation, and apparatus for disabling the gating apparatus for providing the square wave pulses at an output terminal.

Power management system for components used in battery powered

A method of executing states of a clean-up state machine while executing a command from a host CPU to read a sector of data stored within a memory array. First, a number of sectors of data are copied from the memory array into a sector buffer. Then, while the host CPU is reading sectors from the sector buffer, a number of states of a clean-up state machine are executed to aid in the conversion of invalid user data into free memory. Also described is a solid state memory disk that converts invalid sectors of data to free memory while executing a read command from a host CPU.

Method of performing clean-up of a solid state disk while executing a

A method of detecting the loss of a sector of data stored in a solid state memory disk is described. Detection is enabled by the creation of a header for each sector number during formatting. Each header includes a logical sector number equal to a sector number. Location and loss of a sector of data associated with a particular sector number is aided by a sector header translation table. The sector header translation table stores an offset, or pointer, for each sector number that points to its associated header. The method by which the sector header translation table is generated aids in the detection of lost sectors of data. Upon power-up, each offset in the sector header translation table is initialized to an initial, invalid value. Afterward, the nonvolatile semiconductor memory is scanned and the sector header translation table is modified so that for each sector number it points to the header including a logical sector number equal to the sector number. As a result, retrieving an invalid offset from the sector header translation table indicates that the sector of data associated with the sector number is lost. Circuitry for detecting the loss of sector data stored in a solid state memory disk is also described.

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Cameron Park, CA, United States of America

Richard P Garner