Nortel Networks Corporation

Bay Networks, Inc.

Other

Richard L Angle

Geoffrey B Ladwig

Edward S Harriman

Nanying Yin

Shantigram V Jagannath

Geoff B Ladwig

Richard P Modelski

Michael J Craren

Adrian M Kristiansen

Jeffrey V Bean

William Melaragni

Marvin Scheinbart

John J Fitzgerald

A method and apparatus are provided for scheduling unicast and multicast data in an input-queued network device. According to one aspect of the present invention, a combined schedule is created by pipelined staging of multicast and unicast scheduling. Multicast cells are scheduled for transmission among multiple interfaces of a crossbar by performing a multicast cell scheduling cycle for multiple classes of service that are supported by the network device. Then, unicast cells are scheduled for transmission among the interfaces at a lower priority than the previously scheduled multicast cells by performing a unicast cell scheduling cycle for the multiple classes of service using only those interfaces that remain unmatched after completion of the multicast cell scheduling cycle.

Multicast and unicast scheduling for a network device

A method performs a radix search data structure. The method selects a reference table based on a value of a selectable parameter. The reference table includes at least one of a valid reference table and a transition reference table, and contains a set of data bits. The method receives a key containing a set of data bits. The method indexes the reference table using at least a subset of data bits in the key. The method determines a result index based on at least a subset of data bits in the reference table. The method then indexes a result table based on the result index to reference a result of a radix search data structure.

Method and apparatus for performing a radix search by selecting one of a valid table and a transition table

A method and apparatus are provided for scheduling multicast data in an input-queued network device. A fabric arbiter receives a transmit request associated with multiple input ports. The transmit request identifies those of the output ports to which pending multicast cells are ready to be transmitted, if any. The fabric arbiter receives a backpressure signal from a backpressuring output port. Then, based upon the backpressure signal the fabric arbiter schedules multicast cells for transmission across the fabric. If the size of a multicast queue exceeds a predetermined threshold, then the fabric arbiter ignores the backpressure signal and causes the head-of-line multicast cell from the multicast queue to be transferred to the backpressuring output port. Otherwise, the fabric arbiter prevents multicast cells from being transferred to the backpressuring output port by masking requests destined for the backpressuring output port thereby removing the backpressuring output port from consideration during multicast scheduling.

Backpressure mechanism for a network device

A method and apparatus are provided for scheduling multicast data in an input-queued network device. According to one aspect of the present invention, deterministic and bounded delay for high priority multicast cells is guaranteed by the multicast scheduler. The scheduler receives a transmit request associated with each of a plurality of input ports. The transmit request identifies output ports to which pending multicast cells are ready to be transmitted, if any. Then, for each of multiple classes of service, the scheduler performs a single scheduling iteration. The single scheduling iteration includes a grant phase, an accept phase, and an update phase. During the grant phase, the scheduler grants one or more of the input ports access to the fabric by issuing grants based upon the transmit requests and a priority indicator that identifies an input port that is given scheduling priority for the scheduling iteration. During the accept phase, on behalf of each of the input ports, the scheduler accepts all grants corresponding to the input port. Finally, during the update phase, the scheduler updates the priority indicator for use in a subsequent scheduling cycle.

Multicast scheduling for a network device

An apparatus and method for storage of memory packets with a high aggregate bandwidth is disclosed. An odd-even memory bank structure effectively doubles the memory available for packet storage. A packet memory arbitration scheme aligns access of devices reading and writing into packet memory allowing full-rate access to the packet memory.

Apparatus and method for interleaved packet storage

A method performs a radix search data structure. The method receives a key containing a set of data bits. The method determines a reference index based on a first subset of data bits in the key. The method indexes a reference table based on the reference index to locate a reference field. The method determines a result index based on a second subset of data bits in the key and the reference field. The method then indexes a result table based on the result index to locate a result of a radix search data structure.

Method and apparatus for performing distinct types of radix searches

A method and apparatus are provided for scheduling unicast and multicast data in an input-queued network device. According to one aspect of the present invention, multicast scheduling is triggered by a programmable parameter. Each scheduling timeslot of a set of possible scheduling timeslots, unicast cell scheduling is performed. Multicast cell scheduling is performed in parallel with and independent of the unicast cell scheduling during scheduling timeslots in which a programmable multicast scheduling frequency parameter satisfies a predetermined condition.

Programmable multicast scheduling for a network device

A memory management technique for maintaining packet order in a packet processing system involves maintaining a START indicator and a VALID indicator for each memory block in a packet memory. Packets are written in a number of successive memory blocks, and the START indicator corresponding to the first memory block of the number of successive memory blocks is set to indicate that the packet is available for processing. The packets are processed by a packet processor. When the packet processor completes the processing of a particular packet, the VALID indicator corresponding to the first memory block associated with that packet is set to indicate that the packet is ready to be forwarded. The packet may become ready to be forwarded out of order. However, the packets are forwarded in first-in-first-out order by processing the packets in first-in-first-out order and only forwarding a particular packet if the VALID indicator corresponding to the first memory block associated with that packet is set to indicate that the packet is ready to be forwarded. Thus, a packet is not forwarded unless and until all previous packets have been forwarded, even if the packet is ready to be forwarded before one or more previous packets.

Memory management technique for maintaining packet order in a packet processing system

A method and apparatus are provided for scheduling multicast data in an input-queued network device. According to one aspect of the present invention, the head-of-line blocking problem is avoided for multicast queues. A fabric arbiter receives a transmit request associated with multiple input ports. The transmit request identifies those of the output ports to which pending multicast cells are ready to be transmitted, if any. The fabric arbiter receives a backpressure signal from a backpressuring output port. Then, based upon the backpressure signal the fabric arbiter schedules multicast cells for transmission across the fabric. If the size of a multicast queue exceeds a predetermined threshold, then the fabric arbiter ignores the backpressure signal and causes the head-of-line multicast cell from the multicast queue to be transferred to the backpressuring output port. Otherwise, the fabric arbiter prevents multicast cells from being transferred to the backpressuring output port by masking requests destined for the backpressuring output port thereby removing the backpressuring output port from consideration during multicast scheduling.

The present invention is a method and apparatus for interconnection system. A first front connector is located at a side of a first front card to provide first contacts for first signal traces on the first front card. A second front connector located at a side of a second front card to provide second contacts for second signal traces on the second front card. A mating connector has first and second receptacles and is located alongside of a rear card. The mating connector electrically connects the first contacts of the first signal traces to the second contacts of the second signal traces via contacts in the first and second receptacles. The first and second receptacles couple to the first and second front connectors, respectively. The rear card is positioned in a substantially orthogonal direction to the first and second front cards.

High throughput interconnection system using orthogonal connectors

A method for handling cache misses in a computer system. A prefetch unit fetches an instruction for execution by one of a plurality of coprocessors. When the preferred embodiment of the present invention experiences a cache miss in a prefetch unit, the process for which an instruction is being fetched is passed off to a memory processor which executes a read of the missing cache line in memory. While the process is executing in memory processor, or queued by the scheduler for execution of the same instruction, the prefetch unit continues to dispatch other processes from the its queue to the other processors. Thus, the computer system, including the processors, do not stall. Processors continue to execute processes. The prefetch unit continues to dispatch processes. When the memory read is completed, the process in which the cache miss occurred is rescheduled by the scheduler. The prefetch again attempts to fetch and decode the instruction and arguments. If another cache miss occurs, the process is again dispatched to the memory processor. Upon reading the cache line, the memory processor again sends the process to the scheduler's queue.

Method and apparatus for handling cache misses in a computer system

A method, apparatus, and article of manufacture for hash lookups using valid bit tables with pointers. A key is compressed by hashing the key using a hash function. The hash key is used as a valid bit index into the valid bit table. A first pointer associated with the valid bit index is then used as a pointer into a first block of entries in a result table. A sum of transition bits in the valid bit table below the valid bit index is used as a result index into the first block of entries in the result table. The result index into the first block of entries may be used to reference a result of the radix search tree lookup. Extra space is added in the result table to enable insertion of entries after the first block of entries. A second pointer is used to add redundant entries from the first block of entries into a second block of entries in the result table.

Method and apparatus for performing hash lookups using valid bit tables with pointers

A method, apparatus, and article of manufacture for performing a radix search tree lookup with a key using a transition table with pointers. The key is used as a transition index into the transition table. A first pointer associated with the transition index is then used as a pointer into a first block of entries in a result table. A sum of transition bits in the transition table below the transition index is used as a result index into the first block of entries in the result table. The result index into the first block of entries may be used to reference a result of the radix search tree lookup. Extra space is added in the result table to enable insertion of entries after the first block of entries. A second pointer is used to add redundant entries from the first block of entries into a second block of entries in the result table.

Method and apparatus for performing radix lookups using transition tables with pointers

A method and apparatus for maintaining an order of processing data packets. One embodiment of the invention includes a first stage of data packet processing, which sequentially receives a plurality of independent data packets. The data packet are to be processed at the first stage in parallel. The plurality of independent data packets are then permitted to continue processing at a separate stage only in the order the independent data packets were received at the first stage of the data packet processing. In one embodiment, the invention includes assigning a sequence number to a first independent data packet of the plurality of packets prior to the first stage of data packet processing. Thereafter, the invention includes comparing the sequence number assigned to the first independent data packet to a servicing number. In response to the sequence number and the servicing number being different by N, wherein N is an integer, the invention permits the first independent packet to continue processing at a separate stage. Thereafter, the servicing number is incremented by replacing the servicing number with the sequence number.

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Wellasley Hills, MA, United States of America

Richard L Angle