Honeywell G.m.b.h.

Honeywell International Inc.

Micron Technology Incorporated

Atmel Corporation

Richard K. Spielberger

Thomas J. Dunaway

James M. Poplett

Richard K Spielberger

Thomas J Dunaway

Lori A Dicks

Ronald James Jensen

Romney R Katti

Jerald M Loy

Bharat B Pant

Allan T Hurst, Jr

Bruce Walker Ohme

James M Poplett

Jon B DCamp

Harlan L Curtis

John C Wittenberger

Deborah A Cullinan

Jeff S Sather

Toan Dinh Nguyen

Francis J Belcourt

Bryan Seppala

William F Jacobsen

Thomas G Wagner

Xavier Sheehy

Arthur H Mones

Michael W Heinks

Charles J Speerschneider

Ronald J Jensen

A heater for heating packaged die for burn-in and heat testing is described. The heater may be a ceramic-type heater with a metal filament. The heater may be incorporated into the integrated circuit package as an additional ceramic layer of the package, or may be an external heater placed in contact with the package to heat the die. Many different types of integrated circuit packages may be accommodated. The method provides increased energy efficiency for heating the die while reducing temperature stresses on testing equipment. The method allows the use of multiple heaters to heat die to different temperatures. Faulty die may be heated to weaken die attach material to facilitate removal of the die. The heater filament or a separate temperature thermistor located in the package may be used to accurately measure die temperature.

Packaged die heater

A method and system for stacking integrated circuits is described. An integrated circuit stack is formed by stacking integrated circuit pairs. The integrated circuit pairs are formed by connecting an active surface of a first integrated circuit to an active surface of a second integrated circuit using flip chip bonding. The first integrated circuit pair is connected to a substrate using an adhesive. The other integrated circuit pairs are stacked sequentially on the first integrated circuit pair using an adhesive. Wire bonding is used to connect the second integrated circuit in each of the integrated circuit pairs to the substrate.

Method and system for stacking integrated circuits

A method for assembling a hermetically sealed package to contain a MEMS die and the hermetically sealed package are presented. The method includes selectively applying a glass mixture to a dome. The dome is heated to a first temperature sufficient to flow the glass mixture. The dome is pressed into contact with a carrier containing the MEMS device, the pressing being maintained at a pressure and for a temporal interval sufficient to flow the glass mixture onto the carrier. The dome is cooled while maintaining contact with the carrier, to a second temperature sufficient to allow the glass mixture to harden into a glass frit thereby to seal the carrier to the dome. The glass frit has a seal width.

System and method for sealing a MEMS device

An IC package that employs top-side conduction cooling. The IC package has a low thermal resistance between a substrate housed within the package and the lid of the package. Thermal resistance is decreased by increasing the conduction cross-sections laterally through the package and lid and vertically from the package into the lid. The lid may also be modified with an extended mesa portion that reduces the gap between the lid and the IC. A thermally conductive spacer may also be interposed between the IC and the lid. Also, the package housing body and lid may be made from high thermal conductivity materials having thermal conductivities of 50 W/mK or greater with matching CTE between the lid and the package.

Integrated circuit package with top-side conduction cooling

A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield is affixed directly to a surface of semiconductor die containing an integrated circuit structure.

Shielding arrangement to protect a circuit from stray magnetic fields

A shielding arrangement for protecting a circuit containing magnetically sensitive materials from external stray magnetic fields. A shield of a material having a relatively high permeability is formed over the magnetically sensitive materials using thin film deposition techniques. Alternatively, a planar shield of relatively high permeability is affixed directly to a surface of semiconductor die containing an integrated circuit structure with magnetoresistive memory cells.

Methods for providing a magnetic shield for an integrated circuit having magnetoresistive memory cells

A ball grid array mounted circuit includes a stress relief substrate having spaced conductive vias extending between its surfaces and connection pads at the surfaces. Solder connections formed from solder balls connect between pads at the top surface and connection pads at an electronic component. Solder connections formed from solder balls connect between pads at the bottom surface and connection pads at a printed circuit board (PCB). The solder connections absorb at least a portion of the stress due to differences between the thermal coefficient of expansion of the electronic component and the PCB.

Stacked ball grid array

An integrated circuit package for use in radiation environments includes a base for receiving an integrated circuit die and has a peripheral surface for receiving a lid. The lid has an inner surface facing the die that has a cladding of a low atomic number material to limit electron emission due to absorbed radiation.

IC package lid for dose enhancement protection

Apparatus for mounting and making electrical connections to sensor devices for use in three axis sensing including a flexible circuit and a substrate shaped so that when a portion of the flexible tape is secured to the substrate the sensor devices can be mounted on the substrate for sensing in the desired three directions. The sensors are connected to conductors in the flexible tape by wirebonds or by other means.

Three axis sensor package on flexible substrate

A method for performing an elevated temperature process on an integrated device whereby a magnetic field is used to maintain the alignment of magnetic domains in magnetically sensitive materials.

Method to permit high temperature assembly processes for magnetically

Chip stacking and capacitor mounting arrangement including a planar spacer separating a first die and a second die. A conductive spacer provides for backside chip grounding in one application and provides for capacitor mounting in another application.

Chip stacking and capacitor mounting arrangement including spacers

A shielding apparatus for an electronic component includes a first insulative encapsulant surrounding at least a portion of the component and a second encapsulant surrounding said first encapsulant and having conductive particles dispersed therein for absorbing ionizing radiation.

Radiation enhanced chip encapsulant

A package for shielding a circuit containing magnetically sensitive materials from external magnetic fields. A shield attached to a base of the package is connected by vias to a first conductive plane. A shield attached to a lid of the package is connected by vias to a second conductive plane. The first shield and the second shield are electrically interconnected. Conductive leads extend from the package and are connected internally to the circuit.

Growing community of inventors

Maple Grove, MN, United States of America

Richard K Spielberger