Delco Electronics Corporation

Delphi Technologies, Inc.

Richard Joseph Ravas

Gregory J Manlove

Robert K Constable

Terrell Anderson

Randall C Gray

Mark Billings Kearney

Paul T Bennett

Walter Kirk Kosiak

Mark Russell Keyse

Ashraf Kamal Kamel

Jiyao Liu

David Robert Arslain

An analog signal gain circuit includes an input receiving an analog input signal defined by an ac signal component due to a driving force and a dc offset component independent of the driving force and an output providing an analog output signal defined by an amplified representation of the analog input signal and a dc offset component corresponding to a reference signal. A digital/analog feedback circuit includes a comparator having the reference signal as a switching threshold connected to an up/down counter having a number of digital outputs. The outputs of the up/down counter are connected to a D/A converter which converts the digital count to an analog feedback signal. The feedback signal is provided to the input of the analog signal gain circuit to minimize variations in the dc offset signal component of the analog output signal by compensating for the dc offset signal component of the analog input signal. The up/down counter is clocked at a slow rate to thereby provide a long time constant for minimizing the dc offset signal component.

Analog/digital feedback circuitry for minimizing DC offset variations in an analog signal

Thermal management of an electronic switch, that provides power to a load, is achieved by monitoring a switch temperature of the electronic switch. When the switch temperature exceeds a first set temperature, the control signal is modified such that an average power dissipated by the electronic switch is reduced. In one embodiment, the control signal is modified by increasing a slew rate of the control signal when the switch temperature exceeds the first set temperature. In another embodiment, a frequency of the control signal is reduced when the switch temperature exceeds the first set temperature.

Thermal management of an electronic switch

An analog signal processing system for determining airbag deployment includes a first low pass filter receiving a conditioned analog accelerometer signal and providing an analog acceleration signal therefrom. A first comparator/latch circuit receives the analog acceleration signal and provides a first signal to a logic circuit. The analog acceleration signal is further provided to a first integrator which converts the signal to a first velocity signal and provides the first velocity signal to a second comparator/latch circuit which provides a second logic level signal to the logic circuit. A second low pass filter receives the analog acceleration signal and provides a low frequency analog acceleration signal to a third comparator/latch circuit which provides a third signal to the logic circuit. The low frequency analog acceleration signal is further received by a second integrator circuit which converts the signal to a second velocity signal and provides the second velocity signal to a fourth comparator/latch circuit which provides a fourth signal to the logic circuit. The logic circuit performs a logic operation on the various logic level signals to provide an airbag deployment signal therefrom. Each comparator/latch circuit has a comparator threshold value associated therewith provided by a threshold circuit. The system is enabled for a preset time period after detecting a predefined acceleration level to provide a time-independent analog algorithm for evaluating the analog acceleration signal for possible airbag deployment.

Analog signal processing system for determining airbag deployment

The firing circuit of an inflatable restraint system is tested to verify operation of two FETs in series with a squib which are used to apply current to the squib. For the test the squib is biased to an intermediate voltage and each FET is turned on alone to apply battery or ground voltage to the squib. High and low voltage detectors sense the voltage excursion past respective thresholds to verify FET operation. A current detector for each FET senses a short when its FET is conducting, and a logic circuit immediately turns off the FET to result in a very brief FET on time. In addition, the voltage detectors may be used to detect shorts prior to FET testing and also to turn off or hold off the FETs when a high or low voltage is detected upon FET testing.

Fast acting FET test circuit with current detection for SIR diagnostics

The firing circuit of an inflatable restraint system is tested to verify operation of two FETs in series with a squib which are used to apply current to the squib. For the test the squib is biased to an intermediate voltage and each FET is turned on alone to apply battery or ground voltage to the squib. High and low voltage detectors sense the voltage excursion past respective thresholds to verify FET operation, and a logic circuit immediately turns off the FET to result in a very short FET on time. If a short is present before the FET is commanded on, a detector and the logic circuit prevents FET conduction to avoid firing or degrading the squib.

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Kokomo, IN, United States of America

Richard Joseph Ravas