Qualcomm Incorporated

Google Inc.

Richard John Shanks

Gerald J Chambers

Craig Aiken

Conrad Smith

Brian Douglas Carlton

Saakar Mathur

Kang Lee

Systems and methods for time control for a data interface between a source device and a receiving device are provided. In one example, a method can include performing a capture time sweep process at the receiving device. The capture time sweep process includes performing a plurality of test data transfers at the receiving device at a plurality of different capture time settings. The method can include determining a capture time window based at least in part on the capture time sweep process. The capture time window can be defined as a duration between a first capture time and a second capture time. The method can include determining a selected capture time between the first capture time and the second capture time. The method can include controlling data transfer across the data interface based at least in part on the selected capture time.

Timing control for data transfer across a data interface

In a portable computing device having a system-on-chip (SoC) Acorn RISC Machine (ARM)-based resource architecture, a peripheral component interconnect express (PCIe) bus is used to insert PCIe device memory into system memory absent a PCIe driver. During a PCIe initialization, the contents of PCIe base address registers (BARs) are mapped or otherwise updated to coincide with values assigned to the PCIe device in the advanced configuration and power interface (ACPI) tables.

Method and a portable computing device (PCD) for exposing a peripheral component interface express (PCIE) coupled device to an operating system operable on the PCD

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Boulder, CO, United States of America

Richard John Shanks