International Business Machines Corporation

Richard James Evans

Anthony M Palagonia

David P Vallett

Jeffrey Alan Kash

Daniel Ray Knebel

Ronald Jay Bolam

James Chen-Hsiang Tsang

Robert J Finch

Gordon M Babson

Allen W Brouillette

Richard J Ross

Philip H Noel

Sebastian Theodore Ventrone

Scott Whitney Gould

David Lewis Gardell

Phillip J Nigh

Pia Naoko Sanda

David F Heidel

Philip S Phoenix

A system and method for determining the location of a particular device on an integrated circuit chip is described. The system and method utilize apparatus for detecting the emission of light during switching events of devices in the circuit during the circuit's processing of an input calculated to actuate the device whose location is desired. Light emissions from the circuit can be temporally and spatially indexed so as to allow deduction, in combination with the a priori knowledge of the logical operation of the circuit, of the location of the desired element. In another embodiment of the invention, a series of images of the circuit can be accumulated, representing the circuit's response to a series of different input signals, each input signal being designed to result in the switching of the desired element. The series of images can be compared to determine the location of the desired element. Also in accordance with the invention, the elements to be located can be either actual functional circuit elements, or fiducials added to the chip for test purposes.

Using time resolved light emission from VLSI circuit devices for navigation on complex systems

Redundant chip sections held in standby are substituted for chip sections that are at risk of over heating based on certain sensor signals. When these signals are received operations of the chip section at risk IS transferred to a redundant chip section and the chip section at risk is shut down. After the original chip section has cooled, it becomes available as a replacement chip section itself. The sensor signals may be based on temperature values, elapsed operation time, and number or rate of operations within a chip section.

Method and apparatus for preventing thermal failure in a semiconductor device through redundancy

A method for forming a silicon on insulator region on a single crystal silicon substrate, comprising the steps of: forming a first dielectric region in a silicon substrate by etching, deposition, and chemical-mechanical polishing; forming a single crystal layer on the substrate by polysilicon deposition and re-growth or epitaxial growth; removing portions of the single crystal layer to produce silicon islands that are fully on the first dielectric region; and filling in the spaces between the silicon islands with a second dielectric, by deposition and chemical-mechanical-polish, that overlaps peripheral portions of the first dielectric. Additional steps subdivide the fully isolated silicon on insulator regions by etching trenches in the islands and backfilling with a third dielectric, by deposition and chemical-mechanical-polish.

Method for fabrication of silicon on insulator substrates

A method for forming a silicon on insulator region on a single crystal silicon substrate, comprising the steps of: forming a first dielectric region in a silicon substrate by etching, deposition, and chemical-mechanical polishing; forming a single crystal layer on the substrate by polysilicon deposition and re-growth or epitaxial grownth; removing portions of the single crystal layer to produce silicon islands that are fully on the first dielectric region; and filling in the spaces between the silicon islands with a second dielectric, by deposition and chemical-mechanical-polish, that overlaps peripheral portions of the first dielectric. Additional steps sub-divide the fully isolated silicon on insulator regions by etching trenches in the islands and backfilling with a third dielectric, by deposition and chemical-mechanical-polish.

Methods for the ready identification of dynamic defects using switching induced light emission from CMOS gates in complex integrated circuits such as microprocessors are described. The rapid increase in the complexity of logic circuits means that practical gate level identification of the sources of dynamic errors will require methods other than the gate by gate tracing of every possible path taken by a given set of instructions. The methods described here are based on the ability of picosecond imaging circuit analysis to detect the switching activity of every gate of a complex circuit in a single, passive measurement, and the ability of data processing today to compare large two- and three-dimensional files.

Image processing methods for the optical detection of dynamic errors in integrated circuits

A heat dissipation apparatus for cooling one or more electronic devices. The apparatus utilizes a moving heat sink a portion of which is in contact with the device to be cooled. The moving heat sink may be in the form of a rotating disk, moving belt or strip. The heat sink may be made from various materials such as metals or plastics.

Method and apparatus for cooling an electronic device

A fixture for holding a semiconductor die against an abrasive media for the purpose of thinning the die is described. The fixture provides means for aligning the back of the die to a reference plane that is coplanar with the plane of the abrasive and is in contact with the abrasive media during the thinning process.

Die thinning apparatus

A process and structure are disclosed for a programmable array for use in a read-only memory comprising diode elements and shorted diode elements. The elements are connected across bit and wordlines. The invention utilizes lateral polysilicon diodes and metal silicide layer bridging the junction of pre-selected diodes to short pre-selected diode elements. Programming is accomplished by either forming the silicide layer across the junctions of pre-selected diodes or removing the silicide layer from the junctions of pre-selected diodes.

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Underhill, VT, United States of America

Richard James Evans