Advanced Micro Devices Corporation

Semicaps Pte Ltd

Richard Jacob Wilcox

Michael R Bruce

Rosalinda M Ring

Brennan V Davis

Victoria Jean Bruce

Glen P Gilfeather

David Harry Eppes

Michael P Taborn

Choon Meng Chua

Lian Ser Koh

Paiboon Tangyunyong

Soon Huat Tan

Arnold Y Louie

Jiann Min Chin

Charles F Hawkins

Gregory A Dabney

Jason Mulig

Edward I Cole, Jr

Palaniappan Muthupalaniappan

Jacob Phang

Spencer A Peterson

Hoo-Yin Ng

A method and apparatus for capturing the internal state of an integrated circuit (IC) for second and higher order speedpath-induced failures. The method includes stretching one or more cycles of an internal clock signal in order to mask a first order speedpath-induced failure (SIF), wherein the internal clock signal is restored to operating at a normal speed subsequent to masking the first order SIF. The internal clock signal may be stopped at a cycle corresponding to a higher order SIF. After stopping the internal clock signal, test output data may be loaded into a scan chain. The method may also be used in conjunction with a laser or other device for other test enhancements.

Method and apparatus for capturing the internal state of a processor for second and higher order speepaths

Apparatus for and methods of inspection using laser beam induced alteration are provided. In one aspect, an apparatus is provided that includes a laser scanning microscope for directing a laser beam at a circuit structure and a source for biasing and thereby establishing a power condition in the circuit structure. A detection circuit is provided for detecting a change in the power condition in response to illumination of the circuit structure by the laser beam and generating a first output signal based on the detected change. A signal processor is provided for processing the first output signal and generating a second output signal based thereon. A control system is operable to scan the laser beam according to a pattern that has a plurality of pixel locations, whereby the laser beam may be moved to a given pixel location and allowed to dwell there for a selected time before being moved to another pixel location.

Laser beam induced phenomena detection

A test fixture having an adjustable capacitance ( ) and a method for testing a semiconductor component using the test fixture ( ). The test fixture ( ) includes a loadboard ( ) having a semiconductor component receiving area ( ), and a power supply input terminal ( ) capable of receiving an unbuffered constant current bias signal from a power supply ( ). A semiconductor component is coupled to the semiconductor component receiving area ( ). A switched capacitor network ( ) mounted on the test fixture ( ) is configured so that a desired load capacitance is coupled to the power supply input terminal ( ) when the semiconductor component is initialized. Then the switched capacitor network ( ) is configured so that substantially zero capacitance is coupled to the power supply input terminal. Power supply voltage fluctuations are mapped while the semiconductor component is biased with the power supply and receiving a voltage alteration signal from a laser.

Test fixture having an adjustable capacitance and method for testing a semiconductor component

A method and apparatus mechanism for testing data processing devices are implemented. The test mechanism isolates critical paths by correlating a scanning microscope image with a selected speed path failure. A trigger signal having a preselected value is generated at the start of each pattern vector. The sweep of the scanning microscope is controlled by a computer, which also receives and processes the image signals returned from the microscope. The value of the trigger signal is correlated with a set of pattern lines being driven on the DUT. The trigger is either asserted or negated depending the detection of a pattern line failure and the particular line that failed. In response to the detection of the particular speed path failure being characterized, and the trigger signal, the control computer overlays a mask on the image of the device under test (DUT). The overlaid image provides a visual correlation of the failure with the structural elements of the DUT at the level of resolution of the microscope itself.

Data processing device test apparatus and method therefor

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Austin, TX, United States of America

Richard Jacob Wilcox