Amdahl Corporation

Richard J Tobias

Allan J Zmyslowski

Robert M Maier

Arno S Krakauer

John C Andoh

Joseph A Petolino

Jeffrey A Thomas

Michael DeMar Taylor

Ajay K Shah

Michael J Begley

David Dooley

Brian T Chase

Mark Von Gnechten

Jack Chen

A partitionable computing system includes main storage units on respective sides of the complex which can be fully controlled and accessible from either side. The system includes a dual port main storage unit design, and a system controller design capable of driving plural main storage unit interfaces. With this configuration, one system controller and the processors attached to that system controller can be taken offline and partitioned off to perform maintenance while all of the physical main storage units remain accessible to the processors on the surviving side of the complex. The operating system sees no loss available memory and the time to perform the maintenance activity is significantly reduced.

Partitionable data processing system maintaining access to all main

In a data processing apparatus, having a user domain with domain storage space and an emulation domain with emulation storage space, emulates an instruction in the user domain by calling a program of instructions in the emulation domain. An instruction register connected to receive the sequence of instructions is partitioned into a plurality of fields. At least one field of the instruction register identifies a location for address information for an operand used in execution of the instruction. The instruction is decoded to generate a control code. The control code includes a branch signal to call the emulation program and a domain access control signal to indicate whether the emulation program requires access to the user domain storage base for execution. During execution of the emulation routine, domain access is implied by the location identified for the address information--a set of locations having been preselected as address registers for implied domain addressing.

Multiple domain emulation system with separate domain facilities which

Bypassing of data from a main storage unit to an instruction and operand processing unit around an intermediate storage unit improves performance in a data processing system. The instruction and operand processing unit supplies requests for operands to the intermediate storage unit or cache. If the line is missing from the cache, the request operand is retrieved from the main storage unit. A bypass data path is connected between the main storage unit, prior to error detecting means in the cache, and the instruction and operand processing unit for transferring requested operands to the instruction and operand processing unit directly. Control, coupled to receive requests for operands and to the instruction and operand processing unit, signals the instruction and operand processing unit to receive the requested operands from the bypass data path when the data includes a requested operand.

Cache move-in bypass

Addressing multiple storage spaces

Growing community of inventors

Palo Alto, CA, United States of America

Richard J Tobias