Intel Corporation

Itt Manufacturing Enterprises, Inc.

Vlsi Technology, Inc.

Corrent Corporation

Cyber Solutions International, LLC

Harris Corporation

Exelis Inc.

Philips Semiconductors Inc.

Richard J Takahashi

Kevin J Osugi

Minda Zhang

John M Davis

Arthur L Gaudette

David R Evoy

Gregg Lahti

Daniel Nelson Heer

Christopher D Lucero

Nhu-Ha Yup

Bryan Doi

Yongyut Yuenyongsgool

R Vaughn Langston

Neil Edward Shea

Methods and systems are provided that provide a portable, cryptographic hardware-software device allowing balancing of the needed heightened security while maintaining the modified communication device's original features and value. The system comprises a single chip comprising a self-contained security boundary and cryptographic processing, and is enabled to quickly and easily connect to and modify an existing, commercial, off the shelf mobile communication device. The systems may be enabled to modify the existing device by being contained in hardware, for example the battery of a smart phone. Then, the system may be connected to the existing device's interface, for example via a 'micro-USB' or other suitable connection, and subsequently provide cryptographic functionality to the existing device.

Method and system for embedding security in a mobile communications device

Architecture for embedding a cryptographic engine in a processor is disclosed. An ASIC processor is embedded with a programmable processing core, such as an FPGA, with the key register and I/O registers remaining in fixed logic.

Configurable ASIC-embedded cryptographic processing engine

A cryptographic system includes a memory device and a processor. The memory device has at least two sections, including a first section and a second section. The processor is configured to determine a mode of operation, receive a signal, and selectively zeroize at least one section of the memory device based at least in part on the received signal and the determined mode of operation.

Trusted tamper reactive secure storage

A security processor performs all or substantially all security and network processing to provide a secure I/O interface system to protect computing hardware from unauthorized access or attack. The security processor sends and receives all incoming and outgoing data packets for a host device and includes a packet engine, coupled to a local data bus, to process the incoming and outgoing packets. The processor further comprises a cryptographic core coupled to the packet engine to provide encryption and decryption processing for packets processed by the packet engine. The packet engine also handles classification processing for the incoming and outgoing packets. A modulo engine may be coupled to the local data bus.

System and method for a secure I/O interface

A multi-function modulo processor architecture is capable of performing multiple modulo mathematic operations. The modulo processor includes a pipeline processing portion that iteratively computes a running partial modulo product using the operands of a modulo mathematic argument to obtain one or more final partial modulo products. The final partial modulo product is post-processed to obtain the final result.

Circuit and method for performing multiple modulo mathematic operations

A security circuit is disposed within the housing of an input/output (I/O) connector assembly that is configured to implement the functionality of a computer system I/O port. Thus, when the connector assembly is mounted on a computer system board the security circuit is mounted right along with the connector assembly. The I/O connector assembly includes a connector housing, an I/O connector, and the security circuit. The connector housing is adapted to mount on the computer system board. The I/O connector is disposed within the connector housing and defines a receptacle adapted to electrically couple to a peripheral device. The security circuit is disposed within the connector housing and is electrically coupled to the I/O port. The security circuit is configured to implement one or more security routines, and is transparent to the I/O functionality until it is needed to implement the security routines.

Computer input/output (I/O) connector assembly having a security circuit disposed therein

A full-adder post processor performs modulo arithmetic. The full-adder post processor is a hardware implementation able to calculate A mod N, (A+B) mod N and (A&#x2212;B) mod N. The processor includes a full adder able to add the operands A and B while modulo reduction is accomplished in the processor by successively subtracting the largest possible multiple of the modulus N obtainable by bit shifting prior to subtraction.

Method and system for a full-adder post processor for modulo arithmetic

A system and method for generating an indeterminate random digital data string based on a sampling source, which varies in frequency and phase, sampling an entropy source that also varies in frequency and phase, and additionally based on the principles of permutation and substitution. The system includes a random number generation circuit and a data substitution circuit coupled to receive random data output from the random number generation circuit. A data permutation circuit is coupled to receive substituted random data output from the data substitution circuit. A data compression circuit is coupled to receive permuted and substituted random data output from the permutation circuit and output at least a portion of the indeterminate random data string. A plurality of variable frequency clocks, each operating at different clock frequencies, are selectively coupled to various of the circuits within the system.

Pipelined digital randomizer based on permutation and substitution using data sampling with variable frequency and non-coherent clock sources

A digital signal processor provides a variety of telephony services for a processor-based system. A standard telephone or speakerphone may be coupled to the processor-based system. Further, both ADSL and analog modem functionality, for communication with other processor-based systems, such as on a network, may be available in some embodiments. Additional graphical user interfaces may be supplied for enhanced communication of telephony services. Single or dual-line connection to the telephone network may be supported. The simultaneous operation of modem and telephony functions may also be possible in some embodiments.

Providing telephony services

A method and apparatus for protecting information communicated between a first and a second device includes generating a request to a third device, the request including information identifying the first and second devices. The third device verifies the first and second devices based on the information in the request. Predetermined information is sent to at least one of the first and second devices, and the first and second devices authenticate each other based on the predetermined information.

Protection of information transmitted over communications channels

A method and apparatus of protecting communications in a receiver having a first and a second module includes issuing a request to a transmitter. The identities of the first and second modules are verified based on information in the request. The transmitter transmits a predetermined message to the receiver after verification. The first and second devices are authenticated based on the predetermined message.

Growing community of inventors

Phoenix, AZ, United States of America

Richard J Takahashi