Nortel Networks Corporation

Avaya Inc.

Richard J Ely

Stanley Chmielecki

A method and apparatus for providing clock fault detection is presented. A first clock of a plurality of clocks on a printed circuit board (PCB) is designated as a reference clock. A reference clock counter is in communication with the reference clock, counting cycles of the reference clock. A counter is provided for each other clock of the plurality of clocks, each counter counting cycles of a respective clock. The reference clock counter and each of the counters are started at a same time. When the reference clock counter reaches a maximum count value the value of each of the counters is stored and a determination is made whether the stored values are expected values.

Clock fault detector

In a system, device, and method for controlling access to a memory, a memory interface device is used to coordinate access to a memory device by a number of host applications. The memory interface device is situated between the number of host applications and the memory device. The memory interface device received memory access requests from the number of host applications, interacts with the memory device for servicing the memory access requests, and provides result/status information to the number of host applications. The memory interface device maintains a separate context for each memory access request in order to correlate each memory access request with the host application that issued the memory access request and the result/status information generated for the memory access request.

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Sudbury, MA, United States of America

Richard J Ely