Zenith Electronics Corporation

Richard J Duchek

Paul Strauss

Johann Steiner

Francis M Ray

Gregory T Laux

Alan V Hayes

Direct contact printing methods and apparatuses are disclosed for applying screen elements to cathode ray tube (CRT) faceplates. A black-surround, or grille, is first applied to the faceplate, followed by deposition of light-emissive phosphors thereon. Means for repeatable positioning of the screen elements on the faceplate, means for registration of the screen elements with each other, and means for maintaining screen element shape and size are also disclosed. Effective pivot axes for the collector are arranged to lie in the plane of the printing substrates.

Method and apparatus for direct contact printing screens on CRT

A production system is disclosed for registering flat tension masks to screen bearing face panels in the manufacture of cathode ray tubes. Both the panel and mask are supported in modules with identical registration features at loading stations and alternately conveyed to an assembly station with a top mounted laser welder for welding the mask to panel rails. A lift assembly up loads the modules into the assembly station where they are registered with the same registration elements. Screen location on the panel is interrogated by panel module associated cameras that view spaced fiducial marks on the panel previously located with respect to the screen. Mask interrogation is also accomplished by a camera array. Early screen interrogation enables the mask to be preliminarily positioned very close to final positioning.

System for registering and assembling tension masks and CRT faceplates

A bridge rectifier comprised of four passivated silicon diode chips coupled to convert an alternating voltage input to a direct voltage output includes four L-shaped leads each coupling the anode or cathode of one diode to either the same or opposite terminal of another diode. Each L-shaped lead includes transversely coupled first and second elongated, linear sections with the first sections of each lead forming either the AC input lines or DC output lines. The second section of each lead is coupled to either the anode or cathode of one of the diode chips, each of which includes a dielectric coated moat, or groove, around the periphery of one of its flat, generally rectangular shaped terminal surfaces which prevents charge migration on the edges of the chip and resulting leakage current. Each lead second section includes an upraised portion along the length thereof adapted for engaging and electrical coupling to either the anode or cathode surface of a diode, which when coupled to a diode terminal allows the remaining portion of the second lead section to be positioned in a spaced manner from the passivation moat as well as from an adjacent edge to prevent charge migration over the edge of the diode. In a second embodiment, the second lead section is provided with a pair of adjacent, facing upraised portions which provides for the interchangeability of all four leads.

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Schaumburg, IL, United States of America

Richard J Duchek