Panasonic Corporation

Richard H Strandberg

Paul Cheng-Po Liang

Koji Takinami

The disclosure provides an effective means for fine-resolution determination of the frequency content of an RF signal using low speed digital circuits. The disclosure relates to a method and apparatus for decomposing a high frequency RF signal into several low frequency signals or data streams without loss of any information and without the use of extraneous circuit components such as local oscillators, mixers or offset phase-locked loops. Single or multiple phase oscillator outputs are fed directly to a single or multiple direct RF frequency-to-digital (DrfDC) circuits. The front end of the DrfDC circuit decomposes a high frequency signal into several low frequency signals without loss of any information. The low frequency signals are processed by the back-end of the DrfDC and converted into digital data streams. The digital data streams are then combined and averaged to represent the frequency of the input RF signal.

Multiphase direct RF frequency to digital converter and related method

The present invention relates to a method and system for glitch correction in an all digital phase lock loop. An all digital phase lock loop can include a phase error signal generation unit, a multi-phase oscillator, a glitch correction unit, and a phase to digital converter. The phase to digital converter receives a multi-phase signal from the multi-phase oscillator and generates a phase signal. The error signal generation unit receives the phase signal and a reference phase signal and generates a phase error signal, which is fed to the glitch correction unit. The glitch correction unit removes the glitches in the phase error signal by a portion of the phase error signal. The phase lock loop can also include a phase rotator and a calibration block. The calibration block instructs the phase rotator to rotate the multi-phase signal by the phase rotation which generates the minimum number of glitches.

Method and system for a glitch correction in an all digital phase lock loop

The present invention is a method and system for compensation of frequency pulling in an all digital phase lock loop. The all digital phase lock loop can utilize a multi-phase oscillator including latches with substantially all of the latches paired with a corresponding dummy cell. The dummy cells can have impedance characteristics, such as variable capacitance values which correspond to the variable capacitance value of the latches such that the sum of the two variable capacitance values remains substantially constant, even when the polarity of the reference clock signal changes. The dummy cells can be, for example, variable capacitors or dummy latches. The phase lock loop can also include a multiplying unit. The multiplying unit can receive a reference clock signal and generate a frequency multiplied reference clock signal.

Method and system for compensation of frequency pulling in an all digital phase lock loop

A device for transmitting information in a communications signal is envisioned. The information is modulated, at least in part, with a first angle-related characteristic. The device has a digital conversion circuit operable to convert information to be broadcast into a digital form. A constellation mapper is coupled to the digital conversion circuit, and is operable to convert the digital information into information associated with a constellation. A trajectory generation circuit generates samples denoting a trajectory within the constellation for the information. A transition analysis circuit determines a change in value of an angle-related characteristic in a transition between two samples, and a threshold detection circuit detects whether the change in value fails to meet a particular threshold. An angle-related characteristic distribution circuit can then distribute a portion of the change in value associated with the transition to at least one other transition.

Apparatus and method for conditioning a modulated signal in a communications device

Methods and apparatus for conditioning low-magnitude events in electrical signals. According to an exemplary method, a low-magnitude event occurring in a signal trajectory of a received electrical signal is analyzed. The low-magnitude event is defined by a data point on a signal trajectory having a magnitude that is less than a predetermined signal magnitude minimum. A correction impulse having a correction magnitude and a correction phase is generated based on the magnitude and phase of data points on the signal trajectory that occur prior to and after the occurrence of the low magnitude event. The correction impulse is combined with the original electrical signal in the temporal vicinity of the low-magnitude event, thereby generating a corrected electrical signal having a more controlled bandwidth.

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Fremont, CA, United States of America

Richard H Strandberg