Sgs-thomson Microelectronics Limited

Sgs-thomas Microelectronics Pte. Ltd.

Richard Grisenthwaite

Peter Cumming

A computer instruction supply system has store and fetch circuitry for obtaining a sequence of instructions, test circuitry for locating the first instruction in the sequence to be enabled, and for testing separately successive instructions in the sequence to locate any branch instruction which is predicted to be taken and control circuitry to disregard target addresses of branch instructions in the sequence prior to the first instruction to be executed.

Computer instruction supply

A cache memory comprises a CAM and a data RAM, the CAM has an associate input and a write input, the associate input being connected to selection circuitry to select write data or associate data so that an associate operation can be effected in parallel with a write operation using the same data to control validation of the write input.

Avoidance of cache synonyms

A cache memory has a plurality of cache partitions each having a CAM array, a data RAM and output control circuitry which determines a different priority for each cache partition and permits a cache hit output only from one partition which has the highest priority with a cache hit.

Cache memory

A branch target buffer comprises a partitioned cache memory having for each partition a CAM array holding the least significant bits of a fetch address, a RAM holding the least significant bits of a target address, and comparators for comparing the most significant bits of the fetch and target addresses to control entry of a branch instruction into the buffer.

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Fife, United Kingdom

Richard Grisenthwaite