Infineon Technologies Ag

Infineon Technologies Austria Ag

Richard Gaisberger

Ravi Keshav Joshi

Jens Peter Konrath

Romain Esteve

Wolfgang Bergner

Stefan Woehlert

Andreas Voerckel

Stefan Krivec

Jochen Hilsenbeck

Stefan Kramp

Florian Grasse

Hiroshi Narahashi

Grzegorz Lupina

Juergen Steinbrenner

Andreas Behrendt

Johann Schmid

Johanna Schlaminger

Anita Satz

Mario Stanovnik

A semiconductor device includes a contact metallization layer that includes aluminum and is arranged on a semiconductor substrate, an inorganic passivation structure arranged on the semiconductor substrate, an organic passivation layer comprising a first part that is arranged on the contact metallization layer, and a second part that is arranged on the inorganic passivation structure, a first layer structure including a first part that is in contact with the contact metallization layer, a second part that is contact with the inorganic passivation structure, and a third part that is disposed on the semiconductor substrate laterally between the inorganic passivation structure and the organic passivation layer.

Semiconductor device and method for forming a semiconductor device

Described herein is a method and a power semiconductor device produced by the method. The method includes: forming a structured metallization layer above a semiconductor substrate; forming a protective layer on the structured metallization layer; forming a first passivation over the structured metallization layer with the protective layer interposed between the first passivation and the structured metallization layer; structuring the first passivation to expose one or more regions of the protective layer; removing the one or more exposed regions of the protective layer to expose one or more parts of the structured metallization layer; and after structuring the first passivation and removing the one or more exposed regions of the protective layer, forming a second passivation on the first passivation and electroless plating the one or more exposed parts of the structured metallization layer.

Passivation structuring and plating for semiconductor devices

A semiconductor device includes a contact metallization layer arranged on a semiconductor substrate, an inorganic passivation structure arranged on the semiconductor substrate, and an organic passivation layer. The organic passivation layer is located between the contact metallization layer and the inorganic passivation structure, and located vertically closer to the semiconductor substrate than a part of the organic passivation layer located on top of the inorganic passivation structure.

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Velden, Austria

Richard Gaisberger