Data General Corporation

Other

Richard G Bratt

Craig J Mundie

Steven J Wallach

Stephen I Schleimer

Gerald F Clancy

David H Bernstein

Walter A Wallach, Jr

Edward S Gavrin

Michael S Richmond

Richard A Belgard

Thomas M Jones

John F Pilat

Ronald H Gruner

John K Ahlstrom

Brett L Bachman

Lawrence H Katz

Douglas M Wells

David A Farber

James T Nealon

Douglas M Well

A data processing system which includes a memory and a processor comprising at least two execution units. The system further includes a microcode control unit for storing sequences of microinstructions and an execution microinstruction stack containing at least one stack frame containing the machine state of a first execution unit when the execution of a microinstruction has been interrupted. A memory microinstruction stack is provided to store a plurality of stack frames, stack frames being transferrable between the execution microinstruction stack and the memory microinstructiion stack. The microcode control unit contains sequences of monitor microinstructions and has associated with it a minotor microinstruction stack for storing the machine state of the first execution unit when the execution of a monitor microinstruction has been interrupted. A second execution unit for executing primarily arithmetic microinstructions includes an execution storage unit containing the current machine state of the second execution unit and an arithmetic stack which stores the machine state of the second execution unit when it has executed a previous arithmetic microinstruction. The memory includes a memory arithmetic stack containing further arithmetic stack frames, stack frames being transferrable between the execution storage unit and the memory arithmetic stack. Further an instruction stack is provided for storing the machine state in the processor when execution of a macroinstruction has been interrupted.

Data processing system having unique microinstruction control and stack

A universal addressing system for use in a digital data processing system including a universal memory for storing data including instructions and at least one local system having access to the universal memory. The universal memory is organized into objects, and each item of data is associated with an object. Each object is specified by a unique identifier, and data is addressed by means of a logical address which specifies the UID of the object containing the data and the offset of the data in the object. A processor in the local system responds to instructions by providing memory operation specifiers to the universal memory. Each memory operation specifier specifies a memory operation and a logical address. The offset in the logical address may specify any bit in the object. The memory operation specifier also specifies a length in bits. The universal memory responds to the memory operation specifier by performing the operation specified by the memory operation specifier on the data item beginning at the location specified by the logical address and containing the specified number of bits.

Universal addressing system for a digital data processing system

Apparatus in a digital computer system capable of performing a call operation and a return operation for obtaining addresses of data from names representing the data. Each name is permanently associated with a procedure containing instructions to which the digital computer system responds. Each name further corresponds to a name table entry which is permanently associated with the same procedure. The corresponding name table entry for a name specifies how a base address and a displacement are to be derived using a plurality of current base addresses. The values of these addresses change only when the computer system executes a call operation suspending a current execution of a procedure and commencing another current execution or a return operation terminating the current execution and resuming the execution which was suspended to commence the terminated execution. The operation of resolving a name, i.e., obtaining the address of the data represented by the name, is performed by name interpretation apparatus in processors of the data processing system. In response to a name, the name interpretation apparatus locates the name table entry corresponding to the name fetches the name table entry, calculates the base address and the displacement using the name table entry and the current architectural base addresses, and then adds the base address to the displacement to obtain the address of the data represented by the name.

Digital data processing system incorporating apparatus for resolving

A digital computer system having a memory system organized into objects for storing data and a processor for processing data in response to instructions. An object identifier and an access control list are associated with each object. The memory system responds to logical addresses for data which specify the object containing the data and the offset of the data in the object and to a current subject for which the processor is referencing the data. The memory system performs a memory operation for the processor only if the access control list for the object specified by the logical address allows the current subject to perform the desired memory operation. The objects include procedure objects and data objects. The procedure objects contain procedures including the instructions and name tables associated with the procedures. The instructions contain operations codes and names representing data. Each name corresponds to a name table entry in the name table associated with the procedure. The name table for a name contains information from which the processor may derive the logical address for the data represented by the name. The processor may then use the logical address to specify a memory operation on the data represented by the name.

Digital computer system incorporating object-based addressing and access

A digital computer system having a memory system organized into procedure and data objects, each having a unique identifier code and an access control list, for storing items of information and a processor for processing data in response to instructions. The instructions contain operation codes and names representing data. Each name corresponds to a name table entry in a name table which contains information from which the processor determines the location and the format for the data. The name table entry specifies a base address of one of a set thereof which change value only when a call or a return instruction is executed. A name interpretation system fetches a name table entry, calculates the base address and a displacement using the name table entry and the current architectural base address and adds the base address to the displacement to form the address of the data represented by the name.

Digital data processing system having a uniquely organized memory system

Apparatus in a digital computer system for obtaining descriptors of data from names representing the data. The digital computer system executes sequences of instructions. Names representing data processed during execution of an instruction sequence are associated with the instruction sequence. Each name associated with the instruction sequence corresponds to a name table entry associated with the instruction sequence. The operation of resolving a name, i.e., obtaining the descriptor for the data represented by the name, is performed by name processing apparatus in processors of the data processing system. In response to a name, the name processing apparatus locates the name table entry corresponding to the name obtains the descriptor for the item represented by the name using the information in the name table entry corresponding to the name. In a present embodiment, the descriptor specifies the address and length of a data item. The information in the name table entry specifies the address of the represented item by specifying a base address and a displacement and further specifies the length and type of the represented item.

A digital data processing system including a processor and memory and employing object addressing. The digital data processing system further includes a system for organizing the system's memory into objects and a system for operating the memory. The memory organization system associates each item of data stored in the memory with an object and each object with an object identifier. The memory operation system performs memory operations on items of data in response to memory operation specifiers received from the processor. The location of a data item upon which a memory operation is to be performed is specified by a logical address. Each logical address contains an object number which is temporarily associated with one object identifier and an offset specifying a location in the object identified by the object identifier currently associated with the object number. The memory operation system includes a single object table which specifies the current temporary associations between object numbers and universal addresses and an object identifier conversion system which establishes the temporary associations in the object table and obtains the object identifiers associated with the object numbers. Also disclosed are object tables in digital data processing systems of the present invention involving a single memory and multiple processors and pointers and pointer to logical address conversion means in digital data processing systems of the present invention.

Digital data processing system employing an object-based addressing

A digital computer system having a memory system organized into objects for storing items of information and a processor for processing data in response to instructions. An object identifier code is associated with each object. The objects include procedure objects and data objects. The procedure objects contain procedures including the instructions and name tables associated with the procedures. The instructions contain operation codes and names representing data. Each name corresponds to a name table entry in the name table associated with the procedure. The name table for a name contains information from which the processor may determine the location and the format for the data (e.g., an operand) represented by the name.

A data processing system having a flexible internal structure, protected from and effectively invisible to users, with multilevel control and stack mechanism and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

Digital data processing system method for making a general call

The processor of the present invention can execute any of a plurality of dialects of 'S-Language' instructions. S-Languages are of a higher order than typical machine languages but of a lower order than the user's own high order language. They can be tailored for compatibility with user high order languages. Each instruction of a particular S-Language is interpreted by a sequence of microinstructions. In the processor of the present invention, dispatching to the microinstruction sequencer is controlled jointly by the instruction bit pattern and the current contents of a dialect register. Each procedure to be executed carries with it information from which the appropriate contents of the dialect register may be determined. Thus, the processor of the present invention can always operate as an effective optimum processor for executing the procedure regardless of the source language chosen for writing that procedure.

Digital data processing system capable of executing a plurality of

A digital computer system having a memory system organized into objects for storing data and a processor for processing data in response to instructions. An object identifier is associated with each object. The memory system responds to logical addresses for data which specify the object containing the data and the offset of the data in the object. The objects include procedure objects and data objects. The procedure objects contain procedures including the instructions. Each instruction contains an operation code which belongs to one of several sets of operation codes. All instructions in a single procedure belong to a single operation code set, and associated with each procedure is an operation code set identifier specifying the operation code set to which the instructions in the procedure belongs. Operation codes are decoded in the processor in response to both the operation code and a dialect value representing the operation code set identifier for the operation code set to which the operation code belongs. The dialect value changes only on execution of a call operation or a return operation.

Digital data processing system incorporating object-based addressing and

A digital data processing system using process synchronization techniques which comprise processing await logic for suspending the execution of a program controlled by a process, virtual processor await logic for performing an await operation at the virtual processor level and for temporarily inhibiting the loading of state items for the execution of the program, virtual processor advance logic for performing an advance operation at the virtual processor level to cease the inhibition of the loading of such state items, and process advance logic for causing the processor of the system to resume execution of the suspended program which is under control of the process.

Digital data processing system

An access control system for use in a digital computer system wherein the memory system is organized into objects, a data item is locatable by specifying an object, instructions are contained in procedures, and the operations performed by the system include a call operation for suspending an execution of a procedure and commencing another execution and a return operation for terminating an execution and resuming a suspended execution. The access control system associates each procedure with a domain, i.e., a set of objects accessible to the procedure. The access control system further includes a secure stack object which is accessible only to the access control system. When a call operation commences execution of a procedure which has a different domain, the access control system responds to the call operation by storing information required to return to the current domain in the secure stack. When a return operation resumes execution of a procedure which has a different domain, the access control system responds to the call operation by using the information in the secure stack to return to the previous domain.

Access control system for use in a digital computer system with

A digital computer system in which data storage is referred to by a descriptor comprising an object number denoting a variable-length block of storage, an offset indicating how far into that block a desired data item begins, and a length field denoting the length of the desired data item. Separate means exist for manipulating each of the three descriptor portions, thus facilitating repetitive operations on related or contiguous operands. Various levels of microcode control are included. Each level of microcode control has its own stack, facilitating interrupts between levels. Stacks are duplicated in 'secure stacks' in memory to protect against loss of state data from the stacks.

Digital data processing system with tripartite description-based

A digital data processing system has a memory organized into objects containing at least operands and instructions. Each object is identified by a unique and permanent identifier code which identifies the data processing system and the object. The system uses a protection technique to prevent unauthorized access to objects by users who are identified by a subject number which identifies the user, a process of the system for executing a user's procedure, and the type of operation of the system to be performed by the user's procedure. An access control list for each object includes an access control list entry for each subject having access rights to the object and means for confirming that a particular active subject has access rights to a particular object before permitting access to the object. The system also includes stacks for containing information relating to the current state of execution of the system.

Growing community of inventors

Wayland, MA, United States of America

Richard G Bratt