International Rectifier Corporation

Qspeed Semiconductor Inc.

Richard Francis

Chiu Ng

Ranadeep Dutta

Perry L Merrill

Eric Earl Johnson

Hamilton Lu

Yang Yu Fan

Jian Li

Peter N Wood

Hy Hoang

Fabrizio Ruo Redda

A semiconductor device is formed in a thin float zone wafer. Junctions are diffused into the top surface of the wafer and the wafer is then reduced in thickness by removal of material from its bottom surface. A weak collector is then formed in the bottom surface by diffusion of boron (for a P type collector). The weak collector is then formed or activated only over spaced or intermittent areas. This is done by implant of the collector impurity through a screening mask; or by activating only intermittent areas by a laser beam anneal in which the beam is directed to anneal only preselected areas. The resulting device has an effective very low implant dose, producing a reduced switching energy and increased switching speed, as compared to prior art weak collector/anodes and life time killing technologies.

Semiconductor device having increased switching speed

A very low Vnon punch through trench IGBT built-in non-epitaxial float zone silicon has a depletion stop layer structure added to its bottom surface.

Trench IGBT with depletion stop layer

An apparatus and method for a fast recovery rectifier structure. Specifically, the structure includes a substrate of a first dopant. A first epitaxial layer lightly doped with the first dopant is coupled to the substrate. A first metallization layer is coupled to the first epitaxial layer. A plurality of trenches is recessed into the first epitaxial layer, each of which is coupled to the metallization layer. The device also includes a plurality of wells each doped with a second dopant type, wherein each well is formed beneath and adjacent to a corresponding trench. A plurality of oxide layers is formed on walls and a bottom of a corresponding trench. A plurality of channel regions doped with the first dopant is formed within the first epitaxial layer between two corresponding wells. Each of the plurality of channel regions is more highly doped with the first dopant than the first epitaxial layer.

Structure and method for a fast recovery rectifier structure

An ultrafast recovery diode. In a first embodiment, a rectifier device comprises a substrate of a first polarity, a lightly doped layer of the first polarity coupled to the substrate and a metallization layer disposed with the lightly doped layer. The ultrafast recovery diode includes a plurality of wells, separated from one another, formed in the lightly doped layer, comprising doping of a second polarity. The plurality of wells connect to the metallization layer. The ultrafast recovery diode further includes a plurality of regions, located between wells of said plurality of wells, more highly doped of the first polarity than the lightly doped layer.

Ultrafast recovery diode

A process for forming an NPT IGBT in a thin N type silicon wafer in which the bottom surface of a thin silicon wafer (100 microns thick or less) has a shallow reduced lifetime region in its bottom formed by a light species atom implant to a depth of less than about 2.5 microns. A Ptransparent collector region about 0.5 microns deep is formed in the bottom of the damaged region by a boron implant. A collector contact of Al/Ti/NiV and Ag is sputtered onto the collector region and is annealed at 200&#xb0; C. to 400&#xb0; C. for 30 to 60 minutes. A pre-anneal step before applying the collector metal can be carried out in vacuum at 300&#xb0; C. to 400&#xb0; C. for 30 to 60 seconds.

High voltage non punch through IGBT for switch mode power supplies

The collector or anode of a non-punch through IGBT formed in a float zone silicon wafer is formed by a P doped amorphous silicon layer deposited on the back surface of an ultra thin wafer. A DMOS structure is formed on the top surface of the wafer before the bottom structure is formed. A back contact is formed over the amorphous silicon layer. No alloy step is needed to activate the anode defined by the P type amorphous silicon.

IGBT with amorphous silicon transparent collector

Semiconductor devices having recombination centers comprised of well-positioned heavy metals. At least one lattice defect region within the semiconductor device is first created using particle beam implantation. Use of particle beam implantation positions the lattice defect region(s) with high accuracy in the semiconductor device. A heavy metal implantation treatment of the device is applied. The lattice defects created by the particle beam implantation act as gettering sites for the heavy metal implantation. Thus, after the creation of lattice defects and heavy metal diffusion, the heavy metal atoms are concentrated in the well-positioned lattice defect region(s).

Process to create buried heavy metal at selected depth

An insulated gate trench type semiconductor device having L-shaped diffused regions, each diffused region having a vertically oriented portion and a horizontally oriented portion extending laterally from the vertically oriented portion, and a method for manufacturing the device in which the vertically oriented portion of each L-shaped diffused region is formed by directing dopants at an angle toward a sidewall of a trench to form the vertically oriented portion using the edge of the opposing sidewall of the trench as a mask.

Angled implant for shorter trench emitter

A wafer having a rounded edge is thinned to 100 microns or less, producing a tapered razor like edge. The edge is ground to blunt it and reduce danger to personnel and equipment during handling of the wafer.

Process of thinning and blunting semiconductor wafer edge and resulting wafer

A diode is formed having a weak injection shallow, low P concentration anode in an N type wafer or die. The resulting diode has a soft reverse recovery characteristic with low recovery voltage and is particularly useful either as a power factor correction diode or as an antiparallel connected diode in a motor control circuit.

Diode with weak anode

An IGBT is formed in a thin (less than 250 microns thick) float zone silicon wafer using a hydrogen implant to form an N buffer layer at the bottom of the wafer. A weak anode is formed on the bottom of the wafer. A single hydrogen implant, or a plurality of hydrogen implants of progressively shallower depth and increasing dose can be used to form the implant in a diffused float zone wafer. The process may also be used to form an N contact region in silicon to permit a good ohmic contact to the silicon for any type device.

Hydrogen implant for buffer zone of punch-through non EPI IGBT

An IGBT has parallel spaced trenches lined with gate oxide and filled with conductive polysilicon gate bodies. The trenches extend through a P base region which is about 7 microns deep. A deep narrow N emitter diffusion is at the top of the trench and a shallow P contact diffusion extends between adjacent emitter diffusions. The N emitter diffusions are arranged to define a minimum R . The trenches are sufficiently deep to define long channel regions which can withstand a substantial portion of the blocking voltage of the device. A second blanket emitter implant and diffusion defines a shallow high concentration emitter diffusion extension at the top of the die for improved contact to the emitter diffusions.

Trench IGBT

A high voltage MOSgated semiconductor device has a generally linear MOSFET type forward current versus forward voltage characteristic at low voltage and the high current, low forward drop capability of an IGBT. The device is particularly useful as the control transistor for a television tube deflection coil. The device is formed by a copacked discrete IGBT die and power MOSFET die in which the ratio of the MOSFET die area is preferably about 25% that of the IGBT. Alternatively, the IGBT and MOSFET can be integrated into the same die, with the IGBT and MOSFET elements alternating laterally with one another and overlying respective P injection regions and N contact regions respectively on the bottom of the die. The MOSFET and IGBT elements are preferably spaced apart by a distance of about 1 minority carrier length (50-100 microns for a 1500 volt device).

Growing community of inventors

Manhattan Beach, CA, United States of America

Richard Francis