Raytheon Company

Richard E Wahl

John L Vampola

Micky R Harris

Sean P Kilcoyne

Justin Gordon Adams Wehner

Joshua J Cantrell

Thomas R Yengst

Christopher Casimir Brough

A scalable independent unit cell device architecture may include a phase-shifting element and a phase shift driver both integrated within the unit cell device. The phase shift driver may be coupled to the phase-shifting element and the phase shift driver may independently control the phase-shifting element to produce an optical beam having a desired phase. The unit cell device may further include an optical antenna that outputs the beam having the desired phase. The unit cell device may be formed as an opto-electronic hybrid optimized to leverage direct bond hybridization (DBH) to attach an electronic integrated circuit wafer to a side of a photonic integrated circuit wafer. The resulting unit cell device (i.e., 24 microns) may tightly integrate individual element-level phase control, which may be implemented within large-scale two-dimensional photonic arrays with hemispherical beam steering.

Scalable unit cell device for large two-dimensional arrays with integrated phase control

An analog counter circuit for use with a digital pixel includes an input; an output; a first inverter connected to the input that produces on a first inverter output a time delayed inverted signal (RP*) from an input signal received at the input; a second inverter connected to the first inverter output that produces a time delayed signal (RP) at a second inverter output from the input signal and that is delayed relative to RP* and a control switch connected between a source voltage and a floating node. The control switch is controlled by the signal RP* on the first inverter output. The analog counter also includes a feedback capacitor connected between the second inverter output and the floating node; an accumulating capacitor that accumulates at least some of a charge that passes through the control switch; and an injection switch connected between the control switch and the accumulating capacitor.

Analog counter with pulsed current source for a digital pixel

An analog counter circuit for use with a digital pixel includes: an input; an output; a first stage electrically coupled to the input that is charged to an initial charge voltage; a second stage that includes an accumulating charge storage device; and a charge transfer device between the first and second stages that includes a transfer voltage. The charge transfer device allows charge from the first stage to pass to the second stage and be accumulated on the accumulating charge storage device as long as a voltage at a node in the first stage is greater than the transfer voltage.

Single phase analog counter for a digital pixel

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Lubbock, TX, United States of America

Richard E Wahl