Kopin Corporation

Richard E McCullough

Jack P Salerno

Ronald P Gale

Dave Hawley

Jhang W Lee

Stephen D Fantone

Robert Park Forsyth

Peter T Carellas

Michael J Thomas

Roy L Youman

John C Fan

Plasma gun anode

Plasma gun nozzle holder

Plasma gun nozzle retention ring

Plasma gun with angled feed couplings

The present invention relates to a light valve projector in which a small high resolution active matrix transmission display is used with a light source, coupling optics and a projection lens to provide a compact presentation system. A preferred embodiment of the system comprises a three light valve system with an arc lamp within a compact housing in which dichroic mirrors separate light from the source into three primary colors and directs the separated light through three active matrix displays manufactured by a thin film transfer process and having a small active area.

Compact high resolution light valve projector

A rear projection monitor having a housing with reduced depth is disclosed. Images produced by liquid crystal active matrices are illuminated by a light source. The images are enlarged and projected by a projection lens having a large rear focus. A mirror reflects the projected images onto a viewing screen. The mirror is positioned between 36.degree. and 45.degree. in relation to the viewing screen. The back of the housing is adjacent to and slopes at the same angle as the mirror. The depth of the projection monitor is between 33% to 41% of the diameter of the viewing screen.

Projection monitor

Rear projection monitor

A GaAs containing nucleation layer is deposited upon Si, Ge/Si, or other single crystal substrate from triethyl gallium (TEG). Deposition from TEG allows a lower deposition temperature which provides a low level of substrate contamination and improved surface morphology.

III-V Semiconductor growth initiation on silicon using TMG and TEG

A method for producing wafers having deposited layers of III-V materials on Si or Ge/Si substrates is disclosed. The method involves the use of multiple in situ and ex situ annealing steps and the formation of a thermal strain layer to produce wafers having a decreased incidence of defects and a balanced thermal strain. The wafers produced thereby are also disclosed.

III-V on Si heterostructure using a thermal strain layer

Annealing method for III-V deposition

A method of OMCVD heteroepitaxy of III/V (GaAs) material on a patterned Si substrate is described wherein heteroepitaxy deposition occurs only on the exposed Si surfaces and nowhere else.

Selective OMCVD growth of compound semiconductor materials on silicon

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Wrentham, MA, United States of America

Richard E McCullough