Advanced Micro Devices Corporation

Richard E Lamm

Pei-Yuan Gao

Tho Le La

Subramanian N Venkatkrishnan

Robert Matthew Ulfig

A method of decorating a semiconductor substrate with an etchant solution is provided for revealing defects, such as microscratches, resulting from an oxide chemical-mechanical planarization (CMP) polishing. An oxide layer is provided over the substrate made from, for example, tetraethylorthosilicate (TEOS). The oxide layer is polished by a CMP process which tends to leave behind microscratches and other defects that can cause conductivity problems on the wafer. To reveal the microscratches, the wafer is decorated or submerged in an etchant, such as an HF etchant, for a period of time. Following the decorating, the wafer is rinsed, dried and inspected. The method improves the ability to identify and optimize steps in a semiconductor fabrication process that cause semiconductor defects.

Method of inspecting a semiconductor wafer for defects

An improved chemical mechanical polishing apparatus for polishing a semiconductor wafer used in the fabrication of silicon-based semiconductor devices is provided so as to eliminate an air pocket bubble from being formed underneath a polishing pad without the need for cutting the same. This is achieved by a CMP platen plug which is disposed in a recess formed in a top cover plate member so as to completely fill the recess in order to displace the air pocket. The polishing pad is then secured over the platen plug and the top cover plate member. As a result, the useful life of the polishing pad has been prolonged.

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Union City, CA, United States of America

Richard E Lamm