Western Digital Technologies, Inc.

Stmicroelectronics Gmbh

S-tec Corporation

Hgst Technologies Santa Ana, Inc.

Seagate Technology Incorporated

Hgst Netherlands, B.v.

Richard David Barndt

Anthony Dwayne Weathers

Xinde Hu

Seyhan Karakulak

Majid Nemati Anaraki

Razmik Karabed

Niranjay Ravindran

Hakan C Ozdemir

Aldo Giovanni Cometti

Mostafa El Gamal

Scott Kayser

Richard Leo Galbraith

Bernardo Rub

Jonas Andrew Goode

James Fitzpatrick

Henry Chin

Ravi J Kumar

Bernie Rub

Vincent Brendan Ashe

Jerry Lo

Kuhong Jeong

Sivagnanam Parthasarathy

Haining Liu

Shayan Srinivasa Garani

Ashot Melik-Martirosian

Bengt Anders Ulriksson

Hung-Cheng Yeh

Hung-min Chang

The subject technology provides for scanning blocks of a flash memory device for erased pages. A first codeword read from a page of a block in a flash memory device is received and provided to a first decoder for decoding. In response to receiving a first success indicator from the first decoder indicating that the first codeword was successfully decoded, first decoded data is provided from the first decoder to a second decoder for verification of the first decoded data. In response to receiving a first failure indicator from the second decoder indicating that the first decoded data was not verified, the page of the block is identified as being in an erased state based on the first success indicator received from the first decoder and the first failure indicator received from the second decoder.

Method and system for identifying erased memory areas

Storage device programming methods, systems and devices are described. A method may generate a mapping of data based on a set of data, the mapping of data including a first mapped data and a second mapped data. The method may include performing a first programming operation to write, in a first mode, the first mapped data to the memory device. The method may include storing the second mapped data to a cache. The method may include generating a second set of data, based on an inverse mapping of the mapping of data including the second mapped data from the cache and the first mapped data from the memory device, for writing, in a second mode, to the memory device, wherein the second set of data includes the set of data, and the first mode and the second mode correspond to different modes of writing to the memory device.

Mapping for multi-state programming of memory devices

Systems and methods for read level tracking and optimization are described. Pages from a wordline of a flash memory device read and the raw page data read from the wordline may be buffered in a first set of buffers. The raw page data for each of the pages may be provided to a decoder for decoding and the decoded page data for each of the pages buffered in a second set of buffers. First bin identifiers may be identified for memory cells of the wordline based on the raw page data and second bin identifiers may be identified for the memory cells of the wordline based on the decoded page data. Cell-level statistics may be accumulated based on the first bin identifiers and the second bin identifiers, and a gradient may be determined for respective read levels based on decoding results for each of the pages and the cell-level statistics. Settings for the read levels may be configured in the flash memory device based on the determined gradients.

Read level tracking and optimization

Storage device programming methods, systems and media are described. A method may include encoding data to generate an encoded set of data. A first programming operation may write the encoded set of data to a memory device. The method includes encoding, using a second encoding operation based on the data, to generate a second set of encoded data. The second set of encoded data is stored to a cache. A first decoding operation is performed, based on the second set of encoded data and the encoded set of data, to generate a decoded set of data. A second decoding operation is performed to generate a second decoded set of data. The second decoded set of data is encoded to generate a third set of encoded data. The method includes performing a second programming operation to write the third set of encoded data to the memory device.

Multi-state programming for memory devices

After a predetermined period of time in a life cycle of a flash memory device, a plurality of reliability values corresponding to a plurality of reads of one or more of the plurality of memory cells are generated; each of the reads using a variation of a predetermined read level voltage. An offset voltage is then identified, offset from the read level voltage. The offset voltage corresponds to a zero crossing point in the range of the reliability values. Once the offset voltage is identified, the read level voltage is set to a calibrated voltage based on the offset voltage.

Calibrating optimal read levels

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San Diego, CA, United States of America

Richard David Barndt