International Business Machines Corporation

Other

Globalfoundries Inc.

Richard D Kaplan

Vijay Narayanan

Cyril Cabral, Jr

Marie Angelopoulos

Wu-Song S Huang

Jane M Shaw

George Frederick Walker

Ying Li

Diane Catherine Boyd

Anda C Mocuta

An L Steegen

Jakub Tadeusz Kedzierski

Victor Ku

Woo-Hyeong Lee

Ricky S Amos

Stanley E Perreault

Marie-Annick Le Corre

Michel R Tissier

Omer H Dokumaci

Suryanarayan G Hegde

Mukesh Vijay Khare

Leon H Kaplan

Maheswaren Surendra

Oleg Gluschenkov

Krishna Gandhi Sachdev

Maheswaran Surendra

Steven M Zimmerman

Harbans S Sachdev

Joyce C Liu

Brian H Desilets

Timothy J Wiltshire

Darius Brown

Susan A Sanchez

Christopher B Shing

Methods of forming edge etch protection using dual layers of positive-negative tone resists. According to a method, a wafer substrate is provided. A first type resist is deposited on a surface of the wafer substrate. The first type resist is patterned and a resist ring is created around a peripheral edge of the wafer substrate. The resist ring is cured. A second type resist is deposited on the surface of the wafer substrate and the resist ring. The second type resist is different from the first type resist.

Forming edge etch protection using dual layer of positive-negative tone resists

The present invention provides for a four dimensional (4D) information distribution system and method which allows on-demand and real-time transmission of time-sensitive and useful self-help data or instructional materials to user. The transmission of the 4D information can be initiated at the user's request or it can be automatically carried out based on a set of established rules, such as a schedule of events. The 4D information distribution system includes a processing device for generating the 4D information, a distribution device for transmission of the 4D information, a receiving device for accepting the 4D information, and a display device for outputting the received 4D information.

Four dimensional (4D) information distribution system and method

The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present invention has the same silicide metal phase and substantially the same height, regardless of the dimension of the silicide metal gate. The present invention also provides various methods of forming a CMOS structure having silicided contacts in which the polySi gate heights are substantially the same across the entire surface of a semiconductor structure.

CMOS silicide metal gate integration

The present invention provides for a mobile device component used in a 4DHelp information distribution system. The mobile device enables a user to utilize the 4DHelp information distribution system in a wireless environment such that even if the user is physically isolated from self-help data or instructional materials, the user can still access useful 4DHelp information and receive significant benefits. The mobile device includes an input device for which the user can enter a user request, a transmitting device that transmits and retrieves 4DHelp data based upon the user's request, a receiver that accepts the 4DHelp data transmitted, and a processing device that provides a visual output display to the user and allows the user to adjust the 4DHelp visual output display.

4DHelp mobile device for 4DHelp information distribution system

A method for forming an oxide layer on a silicon substrate includes forming a sacrificial oxide layer on the silicon substrate, implanting nitrogen into the silicon substrate, annealing the silicon substrate having implanted nitrogen, removing the sacrificial oxide layer from the silicon substrate, and forming an oxide layer on the silicon substrate. The dose of nitrogen implanted into silicon is preferably higher than 1e14 cm . The annealing process is preferably performed at temperatures in a range from about 550&deg; C. to about 1000&deg; C. and for a time period between about 1 second and about 2 hours.

Method of forming an ultra-thin oxide layer on a silicon substrate by implantation of nitrogen through a sacrificial layer and subsequent annealing prior to oxide formation

A method of enhancing the rate of transistor gate corner oxidation, without significantly increasing the thermal budget of the overall processing scheme is provided. Specifically, the method of the present invention includes implanting ions into gate corners of a Si-containing transistor, and exposing the transistor including implanted transistor gate corners to an oxidizing ambient. The ions employed in the implant step include Si; non-retarding oxidation ions such as O, Ge, As, B, P, In, Sb, Ga, F, Cl, He, Ar, Kr, and Xe; and mixtures thereof.

Method of enhanced oxidation of MOS transistor gate corners

Structures containing conducting polymers and methods of fabrication thereof. Electrical conductivity can be induced in polymers selected from the group of substituted and unsubstituted polyanilines, polyparaphenylenvinyles, substituted and unsubstituted polythiophenes substituted and unsubstituted poly-p-phenylene sulfides, substituted polyfuranes, substituted polypyrroles, substituted polyselenophene, polyacetylines formed from soluble precursors, combinations thereof and blends thereof with other polymers. The polymer contains a doping precursor, selected from the group of onium salts, iodonium salts, triflate salts, borate salts and tosylate salts and sulfonoxylimides. Conductivity can be selectively induced in the polymer by selectively doping upon selective exposure to a source of energy such as electromagnetic radiation, an electron beam and heat. The electrically conductive polymers of the present invention are useful as electron discharge layers for electron beam applications, such as, SEM observations, as electromagnetic interference coatings on dielectric surfaces and as electron beam resist which acts as a discharge layer.

Electrically conductive polymeric materials and uses thereof

Structures containing conducting polymers and methods of fabrication thereof. Electrical conductivity can be induced in polymers selected from the group of substituted and unsubstituted polyanilines, polyparaphenylenvinyles, substituted and unsubstituted polythiophenes substituted and unsubstituted poly-p-phenylene sulfides, substituted polyfuranes, substituted polypyrroles, substituted polyselenophene, polyacetylines formed from soluble precursors, combinations thereof and blends thereof with other polymers. The polymer contains a doping precursor, selected from the group of onium salts, iodonium salts, triflate salts, borate salts and tosylate salts and sulfonoxylimides. Conductivity can be selectively induced in the polymer by selectivly doping upon selective exposure to a source of energy such as electromagnetic radiation, an electron beam and heat. The electrically conductive polymers of the present invention are useful as electron discharge layers for electron beam applications, such as, SEM observations, as electromagnetic interference coatings on dielectric surfaces and as electron beam resist which acts as a discharge layer.

Electrically conductive polymeric

A method of image transfer transfer into a substrate by reactive ion etch technique is provided. A mask layer on said substrate is formed by a spin-on film which film is comprised of a mixed organo-functional zircoaluminate or zircotitanate material. The film is dried and cured, and thereafter coated with a radiation sensitive resist. The reist is imagewise exposed and developed, which developing preferably also removes the pattern in the mask exposing the substrate. The substrate is then reactive ion etched, the remaining film acting as a barrier material to the etching.

Method of selective reactive ion etching of substrates

A process for producing a resist pattern by dry development using a resist comprising from 70 to 50% by weight of a novolac resin and from 30 to 50% by weight of a poly(ether pentene sulfone).

Dry-developed, negative working electron resist system

Improved resolution in optical lithography, as used in the very large scale integration of electronic circuits, is obtained by employing a thin film of 4-phenylazo-1-naphthylamine between silicon substrate and overlying layer of light sensitive photoresist. The 4-phenylazo-1-naphthylamine acts as a stable, highly light absorbent medium exhibiting chemical and physical compatibility with the silicon substrate and photoresists with ether-type solvent systems.

Resolution in optical lithography

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Wappingers Falls, NY, United States of America

Richard D Kaplan