Hughes Electronics Corporation

Hughes Aircraft Company

Richard Clewer

Andrew MacDonald

J Mark Steber

Janavikulam Anandkumar

Bala Subramaniam

Neal David Becker

Yezdi F Antia

Kumud Patel

Robert L Richmond

Richard Sims

Theodore C Hockey

An apparatus for providing automatic gain control for use in a satellite terminal of a satellite communication system capable of transmitting a plurality of different modes of data. The apparatus includes a demodulator circuit having an analog to digital converter; a first variable attenuator having an attenuation value set on the basis of a measured power level of a predetermined data signal; and a second variable attenuator having an attenuation value set on the basis of the mode of data being received by the satellite terminal, where each of the data modes have a corresponding predetermined attenuation value associated therewith which is utilized as the attenuation value of the second variable attenuator when the satellite terminal receives the data mode.

Method and system for adaptive equalization for receivers in a wide-band satellite communications system

Method and system for automatic gain control in a satellite communications system

An application-specific integrated circuit (ASIC) for performing a selected one of a plurality of programmable functions on one or more input signals. The ASIC includes a plurality of component circuits (21-28), each for performing a predetermined component function (F.sub.1 -F.sub.8) on a signal supplied thereto, a plurality of component routers (31-36) for selectively coupling together the plurality of component circuits (21-28), and a control processor interface (40) for receiving control signals that control the plurality of component routers (31-36) such that selected component circuits (21-28) are coupled together in a manner by which the predetermined component functions (F.sub.1 -F.sub.8) of the selected component circuits are performed on the input signal in an order necessary to accomplish the selected one of the plurality of programmable functions. An application of the above-described circuit to a signal processing ASIC useful in stand-alone satellite modems is also disclosed.

Application-specific integrated circuits having programming functions

A method and apparatus utilizing the techniques of frequency shifting and filtering for converting an input signal having a desired signal at intermediate frequency and an undesired DC offset to a baseband frequency signal in which the undesired DC offset is eliminated. The apparatus includes a first multiplier for multiplying the input signal by a signal having substantially the same intermediate frequency plus an offset frequency (.DELTA.f) to produce a first output signal wherein the desired signal is shifted in frequency to the offset frequency (.DELTA.f) and the undesired DC offset is unaffected. The apparatus also includes a second multiplier coupled to the first multiplier for multiplying the first output signal by a signal having substantially the same offset frequency (.DELTA.f) to produce a second output signal having the desired signal shifted to baseband frequency and the undesired DC offset shifted in frequency to the offset frequency .DELTA.f. In addition, a filter coupled to the second multiplier filters the output signal to remove the undesired DC offset while leaving the desired signal, now located at baseband frequency, intact.

Method and apparatus for eliminating DC offset for digital I/Q

A symbol timing recovery method and device which aligns the received data with a free-running symbol clock such that the aligned data sampling error is minimized. The symbol timing recovery process consists of detecting the timing phase error between the transmitters symbol clock and the receiver symbol clock, filtering the error, and then using the filtered error signal to control a block which changes the phase of the data relative to the timing reference signal. A data zero-crossing phase error detector drives a loop filter whose most significant bits form the address of the FIR coefficient ROM, which allows the FIR to interpolate data at sub-symbol resolution. The FIR coefficients are then used to synchronize the received data with the receiver clock.

Symbol timing recovery using fir data interpolators

A method and apparatus for use in estimating phase error in a phase-modulated carrier. The method and apparatus of the present invention may be embodied in a phase-error-estimator circuit which is typically incorporated into a demodulator of a digital communications receiver. In general, the phase-error-estimator circuit receives the I and Q components of a phase-modulated signal, and outputs an estimate of the phase error, if any, in the phase-modulated carrier signal associated with the received I and Q. Preferably, the phase-error-estimator circuit includes an index/polarity generator circuit coupled to a look-up table. The index/polarity generator receives I and Q and maps them onto a reduced range of phase angles represented by values X and Y. X and Y are fed to a reduced and substantially triangular look-up table which outputs the stored phase-error-estimate for the particular X and Y inputs.

Growing community of inventors

Ijamsville, MD, United States of America

Richard Clewer