General Electric Company

Lockheed Martin Corporation

Aircell LLC

Richard Charles Gaus, Jr

John Erik Hershey

Gary Jude Saulnier

Kenneth Brakeley Welles

Stephen Michael Hladik

Richard August Korkosz

Jeffrey Michael Ashe

Ralph Thomas Hoctor

Nick Andrew Van Stralen

Glen William Brooksby

Naofal Mohammed Al-Dhahir

Jimmy C Ray

Charles McDonald Puckette, Iv

Robert L George

Janos Gyorgy Sarkozi

Richard L Frey

Wayne Curtis Taft

Howard L Lester

An analog-to-digital converter compensating apparatus and associated methods are provided. The apparatus can include an ADC, a state-slope sampler responsive to output data of the ADC to produce a state sample and a slope sample, a compensator which can include memory having an error-table associated therewith to provide an error or compensation sample to a combiner which combines the compensation sample with the state value to provide a compensated ADC output, and a compensator error processor positioned to receive the state sample, the slope sample, and an updated error value to dynamically update the compensator and thereby dynamically update the compensated ADC output.

Analog-to digital converter compensating apparatus and associated methods

A geometric harmonic modulation (GHM) communication system communicates GHM signals on a power line of a reconfigurable network. The GHM communication system includes a master controller connected to the power line for transmitting GHM signals on the power line. A boundary component is also connected to the power line. A GHM addressable device is connected to the power line between the master controller and the boundary component. The GHM addressable device defines a boundary of a network region based on the GHM signals transmitted over the power line.

Apparatus and method for reconfiguring a power line communication system

Filter coefficients of a beamformer are computed based on a segment of input samples. The segment of input samples is divided into a plurality of blocks of input samples wherein the plurality of blocks of input samples are received by a shared memory at a first rate. The first block of the plurality of blocks is received in the shared memory at a first time. The plurality of blocks of input samples from the shared memory are read out at a second rate wherein the first block of the plurality of blocks is read from the shared memory at a second time. A plurality of partial covariance matrices for the plurality of blocks read from the shared memory are computed and added together to determine a covariance matrices used to compute the filter coefficients.

Adaptive digital beamformer coefficient processor for satellite signal interference reduction

A method and apparatus are described for a networked lighting system that may be controlled either remotely or locally by a power line communication (PLC) link. The components of the system, addressable lamp ballasts and addressable wall switches, replace their conventional counterparts. The resulting networked lighting system implemented with these components is controlled remotely from a centralized building control center. A particular room may be controlled by the building control center or locally by a wall switch. The invention requires no rewiring of the building's wiring plant, because the addressable components are direct electrical replacements, and installation of the system, therefore, takes a minimum amount of time.

Method and apparatus for networked lighting system control

A method and computer program product are disclosed for locating signal jammers in a digital beamforming receiver having an antenna with a plurality of associated antenna orientations. An associated antenna gain value is calculated for a first of a sequence of the plurality of antenna orientations at each of a series of sample points. The antenna gain values from the first antenna orientation are evaluated for null spaces to obtain a set of candidate null locations. Associated antenna gain values are calculated and evaluated for subsequent antenna orientations only at the set of candidate null locations. Candidate null locations are eliminated from the set after any evaluation in which they are not found to be null spaces.

Memory efficient jammer locator for a digital adaptive beamforming receiver

A communication system includes a transmitter configured to pulse shape a GHM signal to confine the frequency spectrum of the GHM signal within a predefined frequency range. A receiver is also included that receives the transmitted GHM signal. The receiver includes a processor for maximizing the GHM signal to noise ratio and minimizing the bit error rate. The GHM signals are also synchronized to establish a relative time for correct interpretation of bit positions.

Geometric harmonic modulation signaling and detection

A system for spread spectrum power line communications employs a harmonic modulation (HM) transmitter coupled to the power line for transmitting message bits to an HM receiver. The spread spectrum accommodates a plurality of HM transmitters simultaneously occupying the same bandwidth. The spectrum of HM, in a frequency range above 60 Hz but below the maximum frequency that will carry through a distribution transformer, is ideal in combating carrier synchronous noise since it can be interleaved with the noise harmonics and therefore be effectively spectrally disjoint with the synchronous noise process spectrum.

Power line communications spread spectrum symbol timing and random

In a time division multiple access spacecraft communication system, each ground station determines when to send its information packets to arrive at the spacecraft at the beginning of a time slot. The calculation is based upon knowledge of the location of the spacecraft. A master ground station determines the location of the spacecraft by the use of the propagation delays between the various ground stations (including itself) and the spacecraft, together with knowledge of the locations of the ground stations. The spacecraft location is then transmitted back to the various ground stations. The determination of propagation delay by each ground station is performed in two major steps. The first step determines coarse time delay to within one bit interval by repeatedly transmitting a multibit unique word to the spacecraft, and counting bits until the next unique word is received from the spacecraft. To determine fine propagation delay, a high-frequency clock signal is counted from the time of transmission of each bit edge until the reception of the next bit edge. The sum of the coarse and fine delays, together with a plurality of frame intervals, establishes the range to the spacecraft.

Method and apparatus for TDMA slot synchronization with precision ranging

A system for communicating digital information over wires having a great deal of harmonic distortion, such as a power line, employs a transmitter which transmitter which creates a carrier wave for each of a plurality of signals to be sent. This carrier wave has frequency lobes positioned between the frequency lobes of the harmonic distortion. Each of the lobes of a single carrier signal is encoded with the same bit value during a given bit period. This signal is then mixed with any existing signal on the wire. At a remote receiver coupled to the wires, the signal is sensed, filtered, and Fourier transformed into coefficients. The signal-to-noise (S/N) ratio of each Fourier coefficient is determined by a novel S/N estimation technique. The coefficients are weighted based upon the S/N ratio estimation, and decoded, preferably by an inner product of the weighted Fourier coefficients. Additionally, the S/N ratio estimates could be time averaged before being used in the weighting and bit decoding.

Power line communication system

A frequency-shift keying (FSK) demodulator demodulates a binary signal encoded in an FSK signal. The present invention employs a bandpass filter to filter out noise and pass the frequencies used in the modulation. A comparitor converts the received signal into a square wave. A divider reduces the frequency of the square wave signal by a dividing factor. A counter counts the number of square wave transitions in a predetermined time period. A decision device receives the dividing factor from the divider, and uses this factor to adjust the count measured. The adjusted count is compared to counts pertaining to modulated frequencies to select a frequency. A bit value associated with the selected frequency is output for the time period being demodulated.

Frequency shift keying (FSK) demodulator for use in low signal-to-noise

Directional antennae on aircraft and on cellular telephone base stations, having a polarity opposite that of potentially interfering ground system signals, minimize signal strength of air cellular signals received by ground cellular stations. Aircraft directional antennae comprise patch antennae or vertical arrays of loop elements or vertical arrays of virtual loop elements. Additionally, air cellular signals are switched to channels not currently in use by ground cellular systems.

Method and apparatus for reducing interference among cellular telephone

A symbol synchronizer derives a symbol clock reference from a sampled baseband signal which may be of a variety of suitable digital signalling formats, including non-return-to-zero (NRZ) and Manchester formats. A one-bit quantizer receives the sampled signal and provides a binary representation thereof to a level-transition detector which generates a sequence of pulses at the symbol rate of the binary-valued data sequence and at a predetermined timing offset from the symbol timing epochs of the data sequence. The timing offset depends on the digital signalling format and is on the interval ##EQU1## where T is the symbol period. The level-transition detector employs delay circuitry, logic circuitry, and a monostable multivibrator to mask transitions in the quantized data sequence that do not occur at the predetermined timing offset from the timing epochs and to generate the symbol clock pulse sequence. The output pulse sequence from the level-transition detector is applied to a binary-quantized digital phase-locked loop (DPLL) which functions to stabilize the data-derived symbol clock. The average pull-in time of the digital phase-locked loop is reduced by the incorporation of a synchronization acquisition aid which automatically pulls the DPLL into synchronization if the estimated symbol clock timing epoch lies within a lock window a predetermined number of times.

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Burnt Hills, NY, United States of America

Richard Charles Gaus, Jr