Texas Instruments Corporation

Texas Instruments Instruments Incorporated

Richard C Pierson

Benjamin Joseph Sheahan

Fredrick W Trafton

Jeanne Krayer Pitz

Srinivasan Venkatraman

Srinivasan Venkatranan

An apparatus for filtering an input signal includes a first second order filter section having an output and an intermediate output, a second second order filter section having an input connected to the output of the first second order filter, and a gain stage coupling the output of the first second order filter section and the intermediate output of the first second order filter section to the output of the second second order filter section. The gain stage is coupled such that a transfer function between the output of the second second order filter section and the input of the second second order filter section is a biquadratic transfer function.

Method and apparatus for filtering a signal and producing a response

A capacitor current sensing circuitry (100) for sensing the current through a bandpass capacitor (20) of a first biquad stage (80) and generating an output current in response. The capacitor current sensing circuitry (100) includes a differential input circuit comprising a transistor (123) and a transistor (124), a fixed current source (130), a variable current source (120), a variable current, source (122), an input current sink (126), a differential output circuit comprising a transistor (132) and a transistor (134), and a programmable output current sink (138). The differential input circuit receives an input sense voltage and generates a first input current, a second input current, a first output voltage, and a second output voltage in response. The fixed current source (130) generates a current that is used to provide a first current component to the first input current and a first current component to the second input current. The variable current source (120) and the variable current source (122) generate a second component of the first input current and the second input current, respectively. The input current sink (126) receives the first input current and the second input current. The transistor (132) receives the first output voltage and generates a first output current in response, while the transistor (134) receives the second output voltage and generates a second output current in response. The programmable output current sink (138) receives the first output current and the second output current.

Circuitry and method for providing boost and asymmetry in a

A transconductor is provided having a transconductance G.sub.m. This transconductance is then attenuated with a steering circuit (41) to attenuate the overall transconductance of the transconductor and vary the bandwidth. A fixed voltage is then input to the transconductor with the output thereof offset with a programmable current DAC (48). This output is then provided to an error amplifier (46) for developing an error voltage. This error voltage is then input back to the input of the transconductor to adjust the transconductance thereof to minimize this error. The steering circuit (41) is controlled by a voltage DAC (58) to program the attenuation provided thereby. Both the voltage DAC (58) and the current DAC (48) are controlled by a bandwidth control signal to program the bandwidth of the overall transconductor. This is facilitated while compensating for the process and temperature variations of the transconductance of the transconductor. This is also facilitated with a master/slave relationship.

Continuous time filter with programmable bandwidth and tuning loop

A level shift is provided between a first level and a second level for a first and second compensatory signal. Power supply variations are measured and the levels are compensated for these power supply variations so that the power supply does not affect the first and second levels.

Read Channel device

A circuit provides a restart signal to indicate a zero crossing of a continuous varying signal. A zero phase signal is generalized based on a zero crossing of the continuous varying signal. The continuous varying signal is sampled and held in accordance with the zero crossing. The continuous varying signal is converted to complementary signals, and these complementary signals are in turn converted to a signal appropriate for CMOS circuits.

Zero phase circuit for sampled data phase locked loop

A method and circuit for routing data to registers in an integrated circuit is disclosed. The circuit comprises an I/O port (100) for receiving data and address signals, and a plurality of distributed memory modules (200-900) having registers (210-217). Each memory module is associated with and located adjacent to a circuit functional block. All of the memory modules (200-900) are connected to the I/O port (100) via a single data bus (40).

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Dallas, TX, United States of America

Richard C Pierson