Zoran Corporation

Ricardo Jaliff

Ram B Friedlander

Alexander Genusov

Peter Feldman

Rafi Retter

Vlad Fruchter

Asaf Mohr

A concurrent vector signal processor includes a resource manager for utilization of captive signal processing resources. The first instructions in a temporary instruction queue are predecoded and the signal processing resources are selected to execute those first instructions. Arbitration system is provided for external buses connected to a concurrent vector signal processor. A processor arbiter supervises on a priority basis both captive processor resources and independent processor resources. A bus arbiter supervises on a priority basis external and internal buses.

Bus arbitration and resource management for concurrent vector signal

Multiple special purpose processing units are provided in a vector signal processor for concurrent, parallel processing, particularly of complex vectors. The principal processing units are an execution unit, a data movement unit, a control/register unit, a vector buffer unit, an instruction fetch unit, and a bus interface unit.

Architecture for integrated concurrent vector signal processor

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Haifa, Israel

Ricardo Jaliff