Future Wei Technologies, Inc.

Advanced Micro Devices Corporation

Reza Yazdani

Chen Tian

Ziang Hu

Zongfang Lin

Lawrence Davison

Yan Zeng

Viet Trinh

A method of controlling an electronic device is provided, comprising receiving a selection contact within a first icon region of a first icon displayed on a pressure-sensing display screen of the electronic device, displaying on the pressure-sensing display screen a second set of icons related to the first icon, detecting that the selection contact uninterruptedly moves to a second icon of the second set of icons and selects the second icon, displaying on the pressure-sensing display screen a third set of icons related to the second icon, detecting that the selection contact uninterruptedly moves to a third icon of the third set of icons and selects the third icon, and initiating an application or function associated with the third icon.

Software defined icon interactions with multiple and expandable layers

The disclosure relates to technology for establishing communication between a remote device and a virtual machine on a computing node of the cloud-based services via the distributed network. The cloud-based services include multiple operating systems and one or more applications. In response to receiving an instruction from the remote device the virtual machine is accessed, where the virtual machine is associated with at least one of a user of the remote device and the remote device. When directed by an instruction from the remote device, the virtual machine identifies one of the operating systems in which to execute the one or more applications and transmits results, based on execution of the one or more applications by the virtual machine, to the remote device via the distributed network.

Cloud based phone services accessible in the cloud by a remote device

A sender device includes a non-transitory memory storage comprising instructions and a location control policy, and a processor coupled to the memory. The processor executes the instructions to generate an email, generate a control mechanism for the email, wherein the control mechanism instructs a security server to implement the location control policy and wherein the location control policy affects a recipient device's use of the email, and integrate the control mechanism into the email to generate an integrated email. The sender device further includes a transmitter coupled to the processor and configured to transmit the integrated email to the security server for the security server to implement the control mechanism.

Location control and access control of emails

A device for tracing a computer program comprises a non-transitory memory having instructions and one or more processors in communication with the memory. The one or more processors execute the instructions to generate trace code from a trace specification program to trace the computer program. The one or more processors calculate values by executing the computer program and the trace code records, in parallel, the values at a predetermined location in execution of the computer program.

Parallel tracing

An apparatus and method are provided to facilitate a return of a mobile device to an owner. A graphical user interface element is displayed, utilizing a display of a mobile device. A user input is detected in connection with the graphical user interface element, utilizing an input device of the mobile device. An interface is displayed including at least one return option for returning the mobile device to an owner of the mobile device, utilizing the display of the mobile device. Such interface is displayed in response to the detection of the user input in connection with the graphical user interface element utilizing the input device of the mobile device.

Apparatus and method for facilitating return of a mobile device

A system and method for efficiently processing instructions in hardware parallel execution lanes within a processor. In response to a given divergent point within an identified loop, a compiler arranges instructions within the identified loop into very large instruction words (VLIW's). At least one VLIW includes instructions intermingled from different basic blocks between the given divergence point and a corresponding convergence point. The compiler generates code wherein when executed assigns at runtime instructions within a given VLIW to multiple parallel execution lanes within a target processor. The target processor includes a single instruction multiple data (SIMD) micro-architecture. The assignment for a given lane is based on branch direction found at runtime for the given lane at the given divergent point. The target processor includes a vector register for storing indications indicating which given instruction within a fetched VLIW for an associated lane to execute.

Hardware and software solutions to divergent branches in a parallel pipeline

A system and method for efficiently processing instructions in hardware parallel execution lanes within a processor. In response to a given divergent point within an identified loop, a compiler generates code wherein when executed determines a size of a next very large instruction world (VLIW) to process and determine multiple pointer values to store in multiple corresponding PC registers in a target processor. The updated PC registers point to instructions intermingled from different basic blocks between the given divergence point and a corresponding convergence point. The target processor includes a single instruction multiple data (SIMD) micro-architecture. The assignment for a given lane is based on branch direction found at runtime for the given lane at the given divergent point. The processor includes a vector register for mapping PC registers to execution lanes.

Solution to divergent branches in a SIMD core using hardware pointers

A system for providing bound checking to insure memory accessed, including indirect object access through pointers, is within a range of defined object bounds is disclosed herein. Embodiments of the present disclosure provide hardware and software methodology for bound checking, where bound checking is performed in hardware and in parallel with the execution of the memory accesses using dedicated hardware. There is reduced overhead associated with the enforcement of bound checking, and hardware is modified to include new registers and/or instructions for bound checking support. An exception is raised when an out of bound violation is detected. According to some embodiments, a compiler extracts bound information from the respective programming language (e.g. C/C++, Java) and generates tables with special APIs known to the hardware that enables both execution of the program and bound checking to be performed simultaneously.

Hardware and software methodologies for detecting illegal memory address of a memory access operation

A method implemented in a data processing system comprising receiving an input/output (IO) write request from a processing thread to transfer data from a memory of the data processing system to an IO device, setting the memory as read-only memory to protect the data from overwrite before the data is transferred to the IO device, and sending, in response to the IO write request, a speculative IO write completion response to the processing thread to enable the processing thread to continue execution without waiting for the data to be transferred to the IO device.

Optimizing synchronous write via speculation

The present invention provides a method and apparatus for detecting intrusions in a processor-based system. One embodiment of the method includes calculating a first checksum from first bits representative of instructions in a block of a program concurrently with executing the instructions. This embodiment of the method also includes issuing a security exception in response to determining that the first checksum differs from a second checksum calculated prior to execution of the block using second bits representative of instructions in the block when the second checksum is calculated.

Growing community of inventors

Los Altos, CA, United States of America

Reza Yazdani