Texas Instruments Corporation

Reza Sharifi

Orlando Lazaro

Kevin Scoones

Alvaro Aguilar

Rajarshi Mukhopadhyay

Jeffrey Anthony Morroni

Saurav Bandyopadhyay

Pankaj Pandey

Arup Polley

Ryan Erik Lind

Mark A Wolfe

Indumini W Ranmuthu

Bryan E Bloodworth

Timothy Patrick Pauletti

Mark B Weaver

Wenliang Chen

Keliu Shu

Jairo Daniel Olivares

Benjamin Matthew McCue

Byron Mitchell Reed

Taras Vasylyovych Dudar

Diptendu Ghosh

William Martin Torres Escajadillo

A DC-DC regulator system includes a power circuit which has a first input coupled to receive an input voltage, a second input coupled to receive a control signal and an output to provide a regulated output voltage. The system includes a control circuit which has a first input coupled to receive the regulated output voltage, a second input coupled to receive a reference voltage, a first output to provide the control signal, and a second output to provide a converter clock signal. The system includes an out-of-audio circuit which has a first input coupled to receive a minimum threshold frequency signal, a second input coupled to receive the converter clock signal, a third input coupled to the power circuit output, and a fourth input coupled to receive a bandwidth control clock signal.

DC-DC converter with out-of-audio circuit

Aspects of the disclosure provide for a circuit. In some examples, the circuit includes an amplifier having a first input configured to receive a signal representative of a condition related to a power converter, a second input configured to receive a reference signal, and an output, a PWM regulation circuit having an input coupled to the output of the amplifier, a first output configured to provide a first control signal for a high-side transistor of the power converter, and a second output configured to output a first control signal for a low-side transistor of the power converter, and a PFM regulation circuit having an input coupled to the output of the first amplifier, a first output configured to output a second control signal for the high-side transistor of the power converter, and a second output configured to output a second control signal for the low-side transistor of the power converter.

Common control for multiple power converter operation modes

This disclosure relates to a multiphase converter design with multi-path phase management circuit and output logic. The phase management circuit and output logic can be employed to implement phase adding and shedding operations based on input and output current information and based on control signals for a power stage of the converter. In some examples, the design employs an estimate of an average output current based on a current at an input of the converter for phase control. In additional examples, the design employs cycle-by-cycle current limit and maximum duty-cycle signals to enable phase quickly during load transient. In further examples, the design employs low input and output-current sensed signals for efficient phase shedding and power saving. The design herein improves an overall accuracy of phase adding and shedding, load transient response performance, an operational efficiency and thermal performance of multiphase converter.

Multiphase converter design with multi-path phase management

In a described example, an apparatus includes a first switch coupled between a terminal for receiving an input voltage and a top plate node, and having a first control terminal; a second switch coupled between the top plate node and a switching node, and having a second control terminal; a third switch coupled between the switching node and a bottom plate node and having a third control terminal; a fourth switch coupled between the bottom plate node and a ground terminal, and having a fourth control terminal; a flying capacitor coupled between the top plate node and the bottom plate node; a fifth switch coupled between the top plate node and an auxiliary node; a sixth switch coupled between the auxiliary node and the bottom plate node; and an auxiliary capacitor coupled between the auxiliary control terminal and a ground terminal.

Three-level converter using an auxiliary switched capacitor circuit

A power converter device includes a set of switches configured to switch between at least three input-side voltage levels to provide output pulses. The power converter device also includes a control circuit for the set of switches, wherein the control circuit configured to selectively switch the power converter device between a continuous conduction mode of operation (CCM) having a first charge per pulse and a discontinuous conduction mode of operation (DCM) having a second charge per pulse, the second charge per pulse being greater than the first charge per pulse.

Multi-level converter with continuous conduction mode (CCM) and discontinuous conduction mode (DCM)

In described examples of methods and control circuitry to control a power conversion system, a regulator circuit is coupled to provide switching control signals according to a regulation signal to operate a plurality of converter switches to generate a voltage signal at a switching node. A compensation sense circuit is coupled to provide a compensation pulse signal having a duty cycle that represents a percentage of time that a current flowing through the switching node is above a threshold value. A current compensation circuit adjusts the regulation signal according to the compensation pulse signal.

Inductor current sensing and regulation for power converter

In described examples of methods and control circuitry to control a multi-level power conversion system with a flying capacitor, a power circuit regulates a regulator input voltage signal to provide a supply voltage signal to the control circuitry. A power switching circuit couples the regulator input to a first terminal of the flying capacitor in response to a second terminal of the flying capacitor being coupled to a reference voltage node in a given switching cycle, and couples the regulator input to the second terminal in response to the first terminal being coupled to an input node of the power conversion system in the given switching cycle.

Voltage step-down technique for deriving gate-charge using multi-level core architecture

A voltage converter includes a high side transistor, a low side transistor coupled to the high side transistor at a switching node, and an inductor coupled to the switching node and providing an output node. A controller is provided that is coupled to the high side transistor and the low side transistor. The controller is configured to selectively turn on and off the high and low side transistors in a repeat cycle. The controller is configured to control the high and low side transistors to cause a sequence of packets of charge to be delivered to the inductor. Also included is an adaptive timer circuit coupled to the output node and the controller and configured to adaptively adjust the amount of charge in each packet based on the voltage ripple of the output node.

Circuit and method for direct current (DC)-DC voltage converter with adaptive charge transfer

DC-DC voltage converter with adaptive charge transferring capability

An apparatus comprises a root mean square ('RMS') value generator; an integrator coupled to the RMS value generator; a sample and hold switch coupled to an output of the integrator; a capacitor coupled between the sample and hold switch and a ground; an input of the analog to digital convertor ('ADC') coupled to the capacitor; an adder coupled to an output of the ADC; a register, wherein an output of the register is coupled to an input of the adder; and wherein an output of the adder is coupled to an input of the register; and a logic coupled to the register for comparing an output of the register to an RMS threshold value for determining whether a touch-down has occurred.

Apparatus for digital RMS detection and peak detection in head-disk contact detection

A data storage system for detecting a location of a head relative to a magnetic media is described. This system comprises arms, a preamplifier circuit coupled to the arms for controlling the arms, a proximity sensing system positioned within the preamplifier circuit, the proximity sensing system comprising: an input stage for transmitting an input sense signal; a programmable gain stage coupled to receive the input sense signal and operative for transmitting a gain signal in response to receiving the input sense signal; a multiplexer coupled to receive the gain signal and at least one control signal, the multiplexer operative for transmitting a multiplexed signal; a detector coupled to receive the multiplexed signal and a second control signal, the detector operative for transmitting an output signal; wherein an amplitude associated with the output signal enables detecting the location of the head.

Proximity sensing system

Within hard disk drives (HDDs), for example, a preamplifier or preamp is generally used to perform read and write operations with a magnetic head. Typically, for write operations, the preamplifier generates a current waveform that uses a DC current to polarize magnetic elements within the disk and overshoot components to compensate for frequency dependent attenuation in the interconnect between the head and preamp. Conventional pulse-shaping circuitry used for this application uses high voltage to accomplish this task. Here, however, pulse-shaping circuitry is provided which can generate a similar waveform using lower voltage (i.e., about 5V) for this application and others.

Growing community of inventors

Sunnyvale, CA, United States of America

Reza Sharifi