Huawei Technologies Co., Limited

Reza Azimi

Xiang Wang

Kai-Ting Amy Wang

Yaoqing Gao

Ye Tian

Cheng Xiang Feng

Jack Hon Wai Ng

Man Pok Ho

Ehsan Amiri

Henry Fangli Kao

Tomasz Sebastian Czajkowski

Yuanxi Chen

Billy Mengxuan Cai

Zhizhao Qian

Maziar Goudarzi

Craig Davies

Shehab Yomn Abdellatif Elsayed

There is provided methods and devices for dynamically simplifying processor instructions. A method includes receiving, at a computing device, processor instructions and determining, by the computing device, if instruction simplification is enabled for an instruction being processed. The method further includes determining, by the computing device, from an instruction simplification table if the instruction is capable of being simplified and scheduling, by the computing device, a simplified instruction based on the determination from the instruction simplification table. A device includes a processor, and a non-transient computer readable memory having stored thereon instructions which when executed by the processor configure the device to execute the methods disclosed herein.

Method and apparatus for dynamically simplifying processor instructions

A method and hardware system to remove the overhead caused by having stream handling instructions in nested loops. Where code contains inner loops, nested in outer loops, a compiler pass identifies qualified nested streams and generates ISA specific instructions for transferring stream information linking an inner loop stream with an outer loop stream, to hardware components of a co-designed prefetcher. The hardware components include a frontend able to decode and execute instructions for a stream linking information transfer mechanism, a stream engine unit with a streams configuration table (SCT) having a field for allowing a subordinate stream to stay pending for values from its master stream, and a stream prefetch manager with buffers for storing values of current elements of a master stream, and with a nested streams control unit for reconfiguring and iterating the streams.

Methods and systems for nested stream prefetching for general purpose central processing units

A method includes analyzing a dataflow graph representing data dependencies between operators of a dataflow application to identify a plurality of candidate groups of the operators. Based on characteristics of a given hardware accelerator and the operators of a given candidate group of the plurality of candidate groups, determining whether the operators of the given candidate group are to be combined. In response to determining that the operators of the given candidate group are to be combined, retrieving executable binary code segments corresponding to the operators of the given candidate group, generating a unit of binary code including the executable binary code segments and metadata representing an execution control flow among the executable binary code segments, and dispatching the unit of code to the given hardware accelerator for execution of the unit of code.

Method and apparatus for enabling autonomous acceleration of dataflow AI applications

In a distributed computing system comprising multiple processor types, a method of provisioning includes receiving a request from a client device for execution of a function. A first data structure identifies implementations of the function and compatible processor types for each implementation. A second data structure identifies available processors in the system. Compatible processor types matching available processors are candidates for execution of the function. A provisioning instruction is created for allocating resources for execution of the function.

Method and apparatus for hardware acceleration in heterogeneous distributed computing

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Markham, Canada

Reza Azimi