Honeywell Information Systems Italia

Renzo Pederzini

Angelo Bardotti

Ezio Cislaghi

Alessandro Scotti

A semiconductor memory is provided with means for refreshing the memory. Interrupt requests generated by the memory initiate refreshing cycles, which take place in parallel with normal read/write memory operations. The memory is divided in two parts or blocks. If the central processor unit assigns a cycle for read/write operation to one of the two blocks, the same cycle is utilized to recharge or refresh a row of storage elements of the integrated units which constitute the other block of the memory. Refreshing is regulated by low priority interrupt requests and, if not responded to, by high priority interrupt requests, which are mandatory.

Semiconductor dynamic memory and related refreshing system

Apparatus for the flexible coupling of peripheral units to a digital computer system, wherein any input/output port of the system is capable of communicating with a peripheral unit over various forms of interface.

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Melegnano (Milan), Italy

Renzo Pederzini