Cadence Design Systems, Inc.

Renuka Deshpande

Manish Garg

Sourav Kumar Sircar

Akash Khandelwal

Manish Bhatia

Marc Heyberger

Lalit Bharat

Ruchir Agarwal

Anurag Saran

Chunlong Pan

Namrata M Sadhankar

Disclosed are methods, systems, and articles of manufacture for implementing an electronic design with high-capacity design closure. A reduced netlist may be generated for an analysis view of an electronic design based at least in part upon logic of interest in the analysis view. A closure may be performed based at least in part upon a union netlist, wherein the union netlist is generated from the reduced netlist. The electronic design may then be implemented based at least in part upon a result of the closure task.

Methods, systems, and computer program product for implementing an electronic design with high-capacity design closure

Growing community of inventors

Noida, India

Renuka Deshpande