Intel Corporation

Renu Patle

Altug Koker

Ivan Herrera Mejia

Rakesh Mehta

Eyal Pniel

Abraham Halevi Fraenkel

Hanmanthrao Patli

Mohsin Ali

Hagay Spector

Ehud Cohn

Sahar Sharabi

Fylur Rahman Sathakathulla

Raghav Ramesh Lakshmi

Gowtham Raj Karnam

Described herein is a generic hardware/software communication (HSC) channel that facilitates the re-use of pre-silicon DPI methods to enable FPGA-based post-silicon validation. The HSC channel translates a DPI interface into a hardware FIFO based mechanism. This translation allows the reuse of the methods without having to re-implement the entire flow in pure hardware. The core logic for the transactor remains the same, while only a small layer of the transactor is converted into the FIFO based mechanism.

Hardware software communication channel to support direct programming interface methods on FPGA-based prototype platforms

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Folsom, CA, United States of America

Renu Patle