Upmem

Renaud Ayrignac

Fabrice Devaux

A method of protecting a DRAM memory device from the row hammer effect, the memory device comprising a plurality of banks composed of memory rows, may be implemented by at least one logic prevention device configured to respectively associate contiguous sections of rows of a bank with sub-banks. The prevention logic is also configured to execute a preventive refresh cycle of the sub-banks that is entirely executed before the number of rows activated in a sub-bank exceed a critical hammer value. A DRAM memory device, a buffer circuit or a controller of such a memory may comprise the logic for preventing the row hammer effect.

Method and circuit for protecting a DRAM memory device from the row hammer effect

A method of protecting a DRAM memory device from the row hammer effect includes the memory device comprising a plurality of banks composed of memory rows, the method being implemented by at least one logic prevention device configured to respectively associate contiguous sections of rows of a bank with sub-banks and to execute, on each activation of a row of a sub-bank (b) of the memory, an increment step of a required number of preventive refreshments (REFRESH_ACC; REFRESH_ACC/PARAM_D) of the sub-bank (b) using an activation threshold (PARAM_D) of the sub-bank (b). The prevention logic is also configured to execute a preventive refresh sequence of the sub-banks according to their required number of preventive refreshes. A DRAM memory device, a buffer circuit or a controller of such a memory may comprise the logic for preventing the row hammer effect.

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La Rivière, France

Renaud Ayrignac