Micron Technology Incorporated

Ren Earl

Trung Tri Doan

Roger R Lee

Dennis Keller

Gurtej S Sandhu

D Mark Durcan

Max F Hineman

Jeffrey A McKee

A method of forming minimally spaced apart MRAM structures is disclosed. A photolithography technique is employed to define patterns an integrated circuit, the width of which is further reduced by etching to allow formation of patterns used to etch digit line regions with optimum critical dimension between any of the two digit line regions. Subsequent pinned and sense layers of MRAM structures are formed over the minimally spaced digit regions.

Minimally spaced MRAM structures

This invention pertains to a method of fabricating a trenchless MRAM structure and to the resultant MRAM structure. The MRAM structure of the invention has a pinned layer formed within protective sidewalls formed over a substrate. The protective sidewalls facilitate formation of the MRAM structure by a self-aligning process.

Self-aligned, trenchless mangetoresitive random-access memory (MRAM) structure with sidewall containment of MRAM structure

Method for forming minimally spaced MRAM structures

Method of forming self-aligned, trenchless mangetoresitive random-access memory (MRAM) structure with sidewall containment of MRAM structure

A method of forming minimally spaced MRAM structures is disclosed. A photolithography technique is employed to define masking patterns, on the sidewalls of which spacers are subsequently formed to reduce the distance between any of the two adjacent masking patterns. A filler material is next used to fill in the space around the masking patterns and to form filler plugs. The masking patterns and the spacers are removed using the filler plugs as a hard mask. Digit and word lines of MRAM structures are subsequently formed.

This invention pertains to a method of fabricating an MRAM structure. The method includes forming a pinned layer within a protective region defined by sidewalls formed over a substrate. The protective sidewalls facilitate formation of the MRAM structure by a self-aligning process.

Method of forming self-aligned, trenchless mangetoresistive random-access memory (MRAM) structure with sidewall containment of MRAM structure

The system and method disclosed employ one or more switchable, close proximity electromagnets as part of the MRAM device circuit package to apply external magnetic fields to the magnetic elements and conductive lines of the MRAM array. A magnetic field generated by an electromagnet spanning all or part of an MRAM array could be used to selectively erase the MRAM array in whole or in part, respectively. In addition, the magnetic fields could be generated to support the magnetic fields sought to be induced by application of current to the row and column lines of the MRAM array, allowing for the writing of data to magnetic elements in the MRAM array using less power. In additional, diagonally disposed electromagnets could be used to generate these magnetic fields, and could also be used to demagnetize the row and column lines of the MRAM array.

System and method for enabling chip level erasing and writing for magnetic random access memory devices

A method of fabricating a MRAM structure and the resulting structure. The MRAM structure of the invention has the pinned layer recessed within a trench with the upper magnetic layer positioned over it. The method of MRAM fabrication utilizes a spacer processing technique, whereby the upper magnetic layer of the MRAM stack structure is formed between the region defined by the spacers, thereby allowing for self-alignment of the upper magnetic layer over the underlying pinned magnetic layer.

Self-aligned, magnetoresitive random-access memory (MRAM) structure utilizing a spacer containment scheme

The system and method disclosed employ one or more switchable, close proximity electromagnets as part of the MRAM device circuit package to apply external magnetic fields to the magnetic elements and conductive lines of the MRAM array. A magnetic field generated by an electromagnet spanning all or part of an MRAM array could be used to selectively erase the MRAM array in whole or in part, respectively. In addition, the magnetic fields could be generated to support the magnetic fields sought to be induced by application of current to the row and column lines of the MRAM array, allowing for the writing of data to magnetic elements in the MRAM array using less power. In addition, diagonally disposed electromagnets could be used to generate these magnetic fields, and could also be used to demagnetize the row and column lines of the MRAM array.

This invention pertains to a method of fabricating a MRAM structure and the resulting structure. The MRAM structure of the invention has the pinned layer recessed within a trench with the upper magnetic layer positioned over it. The method of MRAM fabrication utilizes a spacer processing technique, whereby the upper magnetic layer of the MRAM stack structure is formed between the region defined by the spacers, thereby allowing for self-alignment of the upper magnetic layer over the underlying pinned magnetic layer.

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Meridian, ID, United States of America

Ren Earl