Taiwan Semiconductor Manufacturing Comp. Ltd.

Ren-Dou Lee

Jen-Hao Liu

I-Shi Wang

Yu-Jui Chen

Chien-Wei Chang

Chien-Chih Chen

Sheng-Tai Peng

Ching-Ling Lee

Chih-Chien Yang

Ming-Lun Shih

Yao-Min Yu

Ya-Jen Sheuh

Yi-Hsun Chiu

Yuan-Hsin Chi

Cheng-Ping Chen

Tsung-Lung Lai

Tzi-Yi Shieh

Ting-Ying Chien

Yi-Chih Chang

Hsien-Liang Meng

Hung-Lin Chen

Tsung-Min Lin

Shih-Chung Chen

Tai-Kun Kao

Jen-Chung Chiu

Chia-Liang Chueh

Wan-Cheng Yang

Kuo-Chou Chen

Chun-Wei Lin

Yi-Shao Lin

Methods for improving wafer bonding performance are disclosed herein. In some embodiments, a method for bonding a pair of semiconductor substrates is disclosed. The method includes: processing at least one of the pair of semiconductor substrates, and bonding the pair of semiconductor substrates together. Each of the pair of semiconductor substrates is processed by: performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP). One of the at least one CVD is performed after all CMP performed before bonding.

Methods for wafer bonding

Described herein are multi-layered windows for use in chemical-mechanical planarization (CMP) systems and CMP processes. The multi-layered windows of the present disclosure include a transparent structural layer and a hydrophilic surfactant applied to at least a portion of at least one surface of the transparent structural layer. Such multi-layered windows may be in the polishing pad, the platen, or both.

Multi-layered windows for use in chemical-mechanical planarization systems

In some embodiments, the present disclosure relates to a chemical mechanical planarization (CMP) tool. The CMP tool includes a carrier and a malleable membrane coupled to the carrier and having a lower surface facing away from the carrier. The lower surface of the malleable membrane includes a first malleable material within a central region of the lower surface and a second malleable material within a peripheral region of the lower surface, which surrounds the central region. The first malleable material provides the central region of the lower surface with a first stiffness and the second malleable material provides the peripheral region of the lower surface with a second stiffness that is different than the first stiffness.

Chemical mechanical planarization membrane

In an embodiment, a system includes: a cassette comprising a slit opening configured to house a wafer; a blade configured to move the wafer to and from the slit opening by extending into the slit opening, wherein a blade thickness of the blade is at most &#x2156; of a height of the slit opening and wherein the blade is configured to secure the wafer within a pocket on the blade that is at least &#x2154; of a wafer thickness of the wafer.

Shiftless wafer blades

In some embodiments, the present disclosure, in some embodiments, relates to a method of forming a CMP membrane. The method is performed by providing a malleable material within a cavity within a membrane mold. The cavity has a central region and a peripheral region surrounding the central region. The malleable material within the cavity is cured to form a membrane. Curing the malleable material is performed by heating the malleable material within the central region of the membrane mold to a first temperature and heating the malleable material within the peripheral region of the membrane mold to a second temperature that is greater than the first temperature.

A method includes: providing a first substrate on which a plurality of first semiconductor devices is formed; providing a second substrate on which a plurality of second semiconductor devices is formed; and coupling the first and second substrates by contacting respective dummy pads of the first and second substrates, wherein at least one of the dummy pads of the first and second substrates comprises plural peaks and valleys.

MEMS package with roughend interface

A multi-layer sealing film for high seal yield is provided. In some embodiments, a substrate comprises a vent opening extending through the substrate, from an upper side of the substrate to a lower side of the substrate. The upper side of the substrate has a first pressure, and the lower side of the substrate has a second pressure different than the first pressure. The multi-layer sealing film covers and seals the vent opening to prevent the first pressure from equalizing with the second pressure through the vent opening. Further, the multi-layer sealing film comprises a pair of metal layers and a barrier layer sandwiched between metal layers. Also provided is a microelectromechanical systems (MEMS) package comprising the multilayer sealing film, and a method for manufacturing the multi-layer sealing film.

Multi-layer sealing film for high seal yield

The present disclosure relates to a method for manufacturing a microelectromechanical systems (MEMS) package. The method comprises providing a CMOS IC including CMOS devices arranged within a CMOS substrate. The method further comprises forming and patterning a metal layer over the CMOS substrate to form an anti-stiction layer and a fixed electrode plate and forming a rough top surface for the anti-stiction layer. The method further comprises providing a MEMS IC comprising a moveable mass arranged within a recess of a MEMS substrate and bonding the CMOS IC to the MEMS IC to enclose a cavity between the moveable mass and the fixed electrode plate and the anti-stiction layer.

Rough anti-stiction layer for MEMS device

Ion generators for ion implanters are provided. The ion generator for an ion implanter includes an ion source arc chamber including an arc chamber housing and a thermal electron emitter coupled to the arc chamber housing. In addition, the thermal electron emitter includes a filament and a cathode, and the cathode has a solid top portion made of a work function modified conductive material including tungsten (W) and a work function modification metal.

Ion generator and method for using the same

Growing community of inventors

Hsinchu, Taiwan

Ren-Dou Lee