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Qimonda Ag

Reinhard J Stengl

Hans Reisinger

Volker Lehmann

Hermann Wendt

Martin Franosch

Thomas Meister

Herbert Schäfer

Gerrit Lange

Jack Allan Mandelman

Josef Willer

Herbert Schaefer

Erwin Hammerl

Wolfgang Hoenlein

Herbert Sch&auml;fer

Herbert Lei Ho

Helmut Klose

Radhika Srinivasan

Josef Böck

Harald Bachhofer

Hans-Willi Meul

Alvin P Short

Jeffrey P Gambino

Franz Hofmann

Johann Alsmeier

Thomas Peter Haneder

Wolfgang H&ouml;nlein

Ulrike Gr&uuml;ning

Son Van Nguyen

Martin Schrems

Wolfgang Krautschneider

Rudolf Lachner

Christine Dehm

Joachim Hoepfner

Martin Seck

Bernhard Poschenrieder

Andreas Spitzer

Matthias L Peschke

Ulrike Gruning

Ulrich Goesele

Lothar Risch

James Gardner Ryan

Wolfgang Klein

Hans-Joerg Timme

Dietrich Widmann

Paul-Werner Von Basse

Josef Boeck

Matthias Ilg

Christine Fellinger

Wolfgang Rosner

Wolfgang Hönlein

Martin Gall

Stefan Ottow

Konrad Wolf

Josef B&ouml;ck

Klaus G Oppermann

Thomas Bohm

Gerd Scheller

Josef BÖCK

An integrated circuit arrangement and method of fabricating the integrated circuit arrangement is provided. At least one integrated electronic component is arranged at a main area of a substrate. The component is arranged in the substrate or is isolated from the substrate by an electrically insulating region. Main channels are formed in the substrate and arranged along the main area. Each main channel is completely surrounded by the substrate transversely with respect to a longitudinal axis. Transverse channels are arranged transversely with respect to the main channels. Each transverse channel opens into at least one main channel. More than about ten transverse channels open into a main channel.

Integrated coolant circuit arrangement, operating method and production method

A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

Method for fabricating a transistor structure

A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the base connection region. The collector connection region contains a buried layer, which connects the collector contact to a collector zone. A silicide or salicide region is provided on the buried layer and connects the collector contact to the collector zone in a low-impedance manner. A second insulation layer is disposed on the collector connection region but not on the silicide region.

High-frequency bipolar transistor and method for the production thereof

High-frequency bipolar transistor

The silicon bipolar transistor () comprises a base, with a first highly-doped base layer () and a second poorly-doped base layer () which together form the base. The emitter is completely highly-doped and mounted directly on the second base layer ().

Silicon bipolar transistor, circuit arrangement and method for producing a silicon bipolar transistor

A bipolar transistor comprising a collector region of a first conduction type, and a subcollector region of the first conduction type at a first side of the collector region. The transistor further includes a base region of the second conduction type provided at a second side of the collector region, and an emitter region of the first conduction type which is provided above the base region on the side remote from the collection region. A carbon-doped semiconductor region is provided on the first side alongside the collector region. The bipolar transistor is characterized in that the carbon-doped semiconductor region has a carbon concentration of 10-10cmand the base region has a smaller cross section than the collector region and the collector region has, in the overlap region with the base region, a region having an increased doping compared with the remaining region. The carbon-doped semiconductor region prevents an outdiffusion from the zone of the collector region into the remaining region of the collector region.

Bipolar transistor comprising carbon-doped semiconductor

Method for producing a transistor structure

The invention relates to a method for producing a bipolar semiconductor element, especially a bipolar transistor, and a corresponding bipolar semiconductor component. The inventive method comprises the following steps: a first semiconductor area () of a first conductivity type (p) is provided above a semiconductor substrate (); a connecting area () of the first conductivity type (p&#x3c;+&#x3e;) is provided above the semiconductor area (); a first insulating area () is provided above the connecting area (); a window (F) is formed within the first insulating area () and the connecting area () so as to at least partly expose the semiconductor area (); a sidewall spacer () is provided in the window (F) in order to insulate the connecting area (); a second semiconductor area () of the second conductivity type (n+) is provided so as to cover the sidewall spacer () and a portion of the surrounding first insulating area (); the surrounding first insulating area () and the sidewall spacer () are removed in order to form a gap (LS) between the connecting area () and the second semiconductor area (); and the gap (LS) is sealed by means of a second insulating area () while a gaseous atmosphere or a vacuum atmosphere is provided inside the sealed gap (LS).

Method for the production of a bipolar semiconductor component, especially a bipolar transistor, and corresponding bipolar semiconductor component

A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third layer is formed with an emitter cutout for an emitter. An undercut is formed in the second layer adjoining the base cutout. The base is at least partially located in the undercut. In order to obtain a low transition resistance between the lead and the base, an intermediate layer is provided between the first and the second layer. The intermediate layer is selectively etchable with respect to the second layer. At least in the region of the undercut between the lead and the base, a base connection zone is provided that can be adjusted independent of other production conditions. The intermediate layer is removed in a contact region with the base.

Bipolar transistor

The invention relates to a method for producing a bipolar transistor. A semiconductor substrate is provided that encompasses a collector area of a first conductivity type, which is embedded therein and is bare towards the top. A monocrystalline base area is provided and a base-connecting area of the second conductivity type is provided above the base area. An insulating area is provided above the base-connecting area and a window is formed in the insulating area and the base-connecting area so as to at least partly expose the base area. An insulating sidewall spacer is provided in the window in order to insulate the base-connecting area. An emitter layer which forms a monocrystalline emitter area above the base area and a polycrystalline emitter area above the insulating area and the sidewall spacer is differentially deposited and structured, and a tempering step is carried out.

Method for the production of a bipolar transistor

A method is provided to fabricate a bipolar transistor with a low base connection resistance, low defect density and improved scalability. Scalability is to be understood in this case as both the lateral scaling of the emitter window and the vertical scaling of the base width (low temperature budget). The temperature budget can be kept low in the base region since no implantations are required in order to reduce the base connection resistance. Furthermore, the difficulties associated with the point defects are largely avoided.

Bipolar transistor and method for fabricating it

The invention provides a memory device for storing electrical charge, which has, as memory elements, tube elements applied on an electrode layer and connect-connected thereto. The tube elements are provided with a dielectric coating, a filling material for filling the space between the tube elements being provided. A counter-electrode connected to the filling material is formed such that an electrical capacitor for storing electrical charge is formed between the electrode layer and the counter-electrode. The tube elements advantageously comprise carbon nanotubes, as a result of which the capacitance of the capacitor on account of a drastic increase in the area of the capacitor electrode surface.

Memory device for storing electrical charge and method for fabricating the same

A reactor configuration contains a housing connected to a silicon wafer. The silicon wafer has pores extending from a first main area of the silicon wafer into an interior of the silicon wafer, preferably as far as a second main area of the silicon wafer. A catalyst layer at least partly covers the surface of the pores.

Reactor configuration and method for producing it

Bipolar transistor and method of fabricating a bipolar transistor

Growing community of inventors

Stadtbergen, Germany

Reinhard J Stengl