Texas Instruments Corporation

Texas Instruments Incorporated Deutschland, Gmbh

Reiner Jumpertz

Klaus Schimpf

Ralph Oberhuber

A method of fabricating an integrated BiCMOS circuit is provided, the circuit including bipolar transistorsand CMOS transistorson a substrate. The method comprises the step of forming an epitaxial layerto form a channel region of a MOS transistor and a base region of a bipolar transistor. Growing of the epitaxial layer includes growing a first sublayer of silicon, a first sublayer of silicon-germanium 28onto the first sublayer of silicon, a second sublayer of silicononto the first sublayer of silicon-germanium, and a second sublayer of silicon-germaniumonto the second sublayer of silicon. Furthermore, an integrated BiCMOS circuit is provided, which includes an epitaxial layeras described above.

Integrated SiGe NMOS and PMOS transistors

The invention relates to a single-poly EPROM comprising a source, a drain, a control gate, a floating gate and an additional gate. The control gate is positioned laterally of a channel between the source and the drain. The floating gate is positioned above the channel above the control gate. The additional gate is positioned above the floating gate, wherein the additional gate is electrically connected to the control gate.

Single-poly EPROM device and method of manufacturing

A vertical thyristor for ESD protection comprises an anode (), a cathode (), a first gate electrode () and a second gate electrode (). The first () and second () gate electrodes are arranged between the anode () and the cathode (), wherein the first gate electrode () is an epitaxial silicon layer () formed upon the anode () and the second gate electrode () is an epitaxial silicon-germanium layer () formed upon the first gate electrode (). The method of fabricating such a vertical thyristor comprises the steps of depositing an epitaxial silicon layer () upon the anode () and depositing an epitaxial silicon-germanium layer () upon the epitaxial silicon layer (), wherein the epitaxial silicon layer () forms the first gate electrode () and the epitaxial silicon-germanium layer () forms the second gate electrode () of the vertical thyristor.

Growing community of inventors

Freising, Germany

Reiner Jumpertz