Cadence Design Systems, Inc.

Regina Mara Amaral Fonseca

Fabiano Cruz Peixoto

Andrea Iabrudi Tavares

Artur Melo Mota Costa

Guilherme Henrique De Sousa Santos

Mirlaine Aparecida Crepalde

Ronalu Augusta Nunes Barcelos

Alberto Manuel Arias Drake

Laiz Lipiainen Santos

Valdir Antoniazzi Júnior

Nathália Peixoto Reis

Patricia Sette Câmara Haizer

Tamires Vargas Capanema Franco Santos

Augusto Amaral Mafra

Lucas Ferreira De Melo Diniz

Hudson Dyele Pinheiro De Oliveira

Lucas Luz Reckziegel

Glauber Tadeu De Sousa Carmo

The present disclosure relates to a computer-implemented method for use in an electronic design. The method may include receiving, using at least one processor, an electronic design and analyzing the electronic design. The method may further include generating one or more preconditions representative of metastability effects at the output of at least one synchronizer associated with the electronic design. The method may also include generating, based upon, at least in part, the one or more preconditions, one or more properties configured to analyze a propagation of the metastability effects associated with the at least one synchronizer.

Systems and methods for automatic formal metastability fault analysis in an electronic design

The present disclosure relates to a method for debugging associated with formal verification of an electronic design. Embodiments may include performing, using a processor, an initial formal verification of an electronic design. Embodiments may further include identifying one or more counter-examples associated with one or more assertion properties of the electronic design or identifying one or more cover-traces associated with one or more cover properties of the electronic design. Embodiments may further include generating a trace core for each of the one or more counter-examples or cover-traces, wherein each trace core includes a minimal representation of the counter-example or cover-trace. Embodiments may further include identifying a similarity between a plurality of the trace cores and clustering the plurality of trace cores having the similarity.

System, method, and computer program product for property clustering associated with formal verification of an electronic circuit design

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Belo Horizonte, Brazil

Regina Mara Amaral Fonseca